2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)最新文献

Subthreshold passive RFID tag's baseband processor core design with custom modules and cells 亚阈值无源RFID标签的基带处理器核心设计与定制模块和单元

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2016-07-01 DOI: 10.1109/ISVLSI.2016.82

Weiwei Shi, Zhao Guangdong, O. Choy

引用次数: 1

Analysis and design of Network on Chip under high process variation 高工艺变化下的片上网络分析与设计

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-16 DOI: 10.1109/ICECS.2015.7440364

Rabab Ezz-Eldin, M. El-Moursy, H. Hamed

{"title":"Analysis and design of Network on Chip under high process variation","authors":"Rabab Ezz-Eldin, M. El-Moursy, H. Hamed","doi":"10.1109/ICECS.2015.7440364","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440364","url":null,"abstract":"Asynchronous router is proposed as a vigorous design to alleviate the impact of process variation in Network on Chip (NoC). The impact of process variation on the network throughput is evaluated by implementing asynchronous and synchronous network on chip designs. Many Network on Chip topologies are used to evaluate the influence of process variation. Circuit analysis is used to evaluate the impact of process variation on both synchronous and asynchronous designs. The delay, throughput and leakage power variation for different NoC topologies are evaluated with taking into consideration NoC interconnects and clock distribution network under process variation with advanced technology. In advanced technologies, process variation crumbles the performance of routing algorithms. For different traffic patterns, the performance of many routing algorithms is determined. Adaptive routing algorithm should be aware of the process variation. To avert the influence of process variation and congestion for asynchronous NoC design, a novel routing algorithm is presented. Process variation Delay and Congestion aware Routing (PDCR) is proposed as adaptive, low cost and scalable routing algorithm. The performance of different routing algorithms is determined and compared to PDCR with process variation under various traffic patterns. Saturation throughput and average message delay are used to evaluate the different routing algorithms. PDCR achieves high performance as compared to different adaptive routing algorithms under various traffic patterns.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129570191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

A platform-based design framework to boost many-core software development 基于平台的设计框架，促进多核心软件开发

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-06 DOI: 10.1109/ICECS.2015.7440313

G. Madalozzo, Marcelo G. Mandelli, Luciano Ost, F. Moraes

{"title":"A platform-based design framework to boost many-core software development","authors":"G. Madalozzo, Marcelo G. Mandelli, Luciano Ost, F. Moraes","doi":"10.1109/ICECS.2015.7440313","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440313","url":null,"abstract":"Embedded software engineers are dealing with complex and large software codes, which will continue to grow. To achieve a cost-effective design, concomitant hardware and software development is required during early design phases. This paper presents an open-source platform based design framework that combines different ADLs and simulators aiming at improving embedded software productivity, targeting future many-core embedded systems. The proposed approach adopts three models: RTL-VHDL level; RTL-SystemC coupled to ISSs; PBD (Platform Based Design) using OVP. The software (operating system and user applications) is the same for both models. Therefore, the OVP modeling allows fast software validation and debuggability. With the SystemC-ISS, it is possible to accurate estimate performance and energy consumption. The low-level model enables, besides area estimation, the validation of low-level protocols, as the communication protocol, network interface or flow-control mechanisms between routers. Results evaluate execution time, simulation time, and the number of executed instructions for several benchmarks using the proposed approach. The OVP model presents in average five times faster than the RTL-SystemC model, and the RTL-SystemC up to 155 times faster than the RTL-VHDL model.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133476105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

On the design of a sparsifying dictionary for compressive image feature extraction 压缩图像特征提取的稀疏化字典设计

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440410

Marco Trevisi, R. Carmona-Galán, J. Fernández-Berni, Á. Rodríguez-Vázquez

{"title":"On the design of a sparsifying dictionary for compressive image feature extraction","authors":"Marco Trevisi, R. Carmona-Galán, J. Fernández-Berni, Á. Rodríguez-Vázquez","doi":"10.1109/ICECS.2015.7440410","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440410","url":null,"abstract":"Compressive sensing is an alternative to Nyquist-rate sampling when the signal to be acquired is known to be sparse or compressible. A sparse signal has a small number of nonzero components compared to its total length. This property can either exist either in the sampling domain, i. e. time or space, or with respect to a transform basis. There is a parallel between representing a signal in a compressed domain and feature extraction. In both cases, there is an effort to reduce the amount of resources required to describe a large set of data. A given feature is often represented by a set of parameters, which only acquire a relevant value in a few points in the image plane. Although there are some works reported on feature extraction from compressed samples, none of them considers the implementation of the feature extractor as a part of the sensor itself. Our approach is to introduce a sparsifying dictionary, feasibly implementable at the focal plane, which describes the image in terms of features. This allows a standard reconstruction algorithm to directly recover the interesting image features, discarding the irrelevant information. In order to validate the approach, we have integrated a Harris-Stephens corner detector into the compressive sampling process. We have evaluated the accuracy of the reconstructed corners compared to applying the detector to a reconstructed image.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"133 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124273733","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Decentralized clustering in VANET using adaptive resonance theory 基于自适应共振理论的VANET分散聚类

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440284

Z. Merhi, O. Tahan, Samih Abdul-Nabi, A. Haj-Ali, M. Bayoumi

{"title":"Decentralized clustering in VANET using adaptive resonance theory","authors":"Z. Merhi, O. Tahan, Samih Abdul-Nabi, A. Haj-Ali, M. Bayoumi","doi":"10.1109/ICECS.2015.7440284","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440284","url":null,"abstract":"Nowadays VANETs are becoming a dominating technology in automotive industries where vehicles communicate with each other to deliver safety messages or any type of information to other vehicles. However, the increasing numbers of vehicles on the roads poses a challenge on designing an efficient communication protocol for VANETs. The scalability issue in VANETs has a deteriorating effect on latency and on the stability of the network. Clustering is one technique used for solving this issue. In this work, we propose a clustering technique that creates mini clusters that are in the same communication range of the vehicles with the help of Adaptive resonance theory (ART). These mini clusters are created based on speed where it categorizes the vehicle in one of three levels: high, medium or low speeds. ART is an unsupervised neural network model that classifies inputs based on the degree of similarities of the input. By carefully tuning ART, three clusters are always obtained corresponding to the above speed classifications. The proposed work was simulated and compared against traditional clustering methods where our work presented a 50% advantage over these techniques.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"29 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117273045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A new 16-bit low-power PVT-calibrated time-based differential Analog-to-Digital Converter (ADC) circuit in CMOS 65nm technology 一种新型16位低功耗pvt校准时基差分模数转换器(ADC)电路，采用65纳米CMOS技术

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440356

A. El-Bayoumi, H. Mostafa, A. Soliman

引用次数: 3

Classical electrical circuitry to support modern control methods 支持现代控制方法的经典电路

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440308

M. Papoutsidakis, D. Tseles, D. Piromalis

{"title":"Classical electrical circuitry to support modern control methods","authors":"M. Papoutsidakis, D. Tseles, D. Piromalis","doi":"10.1109/ICECS.2015.7440308","DOIUrl":"https://doi.org/10.1109/ICECS.2015.7440308","url":null,"abstract":"Pneumatic positioning systems have always been attractive for robotics and automation applications due to their high power-to-weight ratio and low cost. On the other hand, achieving fast and accurate control of their position have been known as a complex control problem and in fact it has not been solved yet in a 100% percentage of position accuracy and repeatability. A smart way to implement the three term classical control approach (PID) to such a system is presented in this paper. The I-Term was selected to be \"switched\" on and off, dynamically and automatically, according to the system control requirements. Although the task sounds challenging for an engineer, the primary aim of this research project is to design and implement an advanced electrical board which will be the embedded interface between an engineer and a pneumatic positioning plant. The interface board will include a microcontroller and all necessary peripheral circuitry as well as the software environment where the control code will be composed. Low cost, easy to pick-up from a local store electrical equipment will be used that can operate under non up to date computer connection thus minimizing the cost of the whole system further. Reliability, low cost and ease of use of the board are critical design factors. The feedback data of the pneumatic system performance will be monitored in a computer monitor via the board's data acquisition operation in real time.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129789090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A high gain and low-offset current-mode instrumentation amplifier using differential difference current conveyors 一种采用差分电流传送带的高增益、低偏置电流模式仪表放大器

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440251

U. Çini, E. Arslan

引用次数: 9

A rail-to-rail-input chopper instrumentation amplifier in 28nm CMOS 28nm CMOS轨对轨输入斩波仪表放大器

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440252

A. Pipino, A. Pezzotta, F. Resta, M. Matteis, A. Baschirotto

引用次数: 5

Bulk and FDSOI Sub-micron CMOS transistors resilience to single-event transients 体积和FDSOI亚微米CMOS晶体管对单事件瞬变的弹性

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI: 10.1109/ICECS.2015.7440267

W. C. Bartra, A. Vladimirescu, R. Reis

引用次数: 10