{"title":"体积和FDSOI亚微米CMOS晶体管对单事件瞬变的弹性","authors":"W. C. Bartra, A. Vladimirescu, R. Reis","doi":"10.1109/ICECS.2015.7440267","DOIUrl":null,"url":null,"abstract":"This work presents a comparison of resilience between a 32nm Bulk and a 28nm Fully-Depleted Silicon On Insulator (FDSOI) transistor to heavy ion impacts on the Drain region. The impacts were performed in different transistor locations at different impact angles whereas previous works considered the impact just at a 0 degree angle. This comparison is performed with the device in the off-state using 2D TCAD simulations. The results show a 7.7 times improved resilience of the FDSOI transistor compared to that of Bulk MOSFET.","PeriodicalId":215448,"journal":{"name":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Bulk and FDSOI Sub-micron CMOS transistors resilience to single-event transients\",\"authors\":\"W. C. Bartra, A. Vladimirescu, R. Reis\",\"doi\":\"10.1109/ICECS.2015.7440267\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents a comparison of resilience between a 32nm Bulk and a 28nm Fully-Depleted Silicon On Insulator (FDSOI) transistor to heavy ion impacts on the Drain region. The impacts were performed in different transistor locations at different impact angles whereas previous works considered the impact just at a 0 degree angle. This comparison is performed with the device in the off-state using 2D TCAD simulations. The results show a 7.7 times improved resilience of the FDSOI transistor compared to that of Bulk MOSFET.\",\"PeriodicalId\":215448,\"journal\":{\"name\":\"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)\",\"volume\":\"83 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2015.7440267\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2015.7440267","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Bulk and FDSOI Sub-micron CMOS transistors resilience to single-event transients
This work presents a comparison of resilience between a 32nm Bulk and a 28nm Fully-Depleted Silicon On Insulator (FDSOI) transistor to heavy ion impacts on the Drain region. The impacts were performed in different transistor locations at different impact angles whereas previous works considered the impact just at a 0 degree angle. This comparison is performed with the device in the off-state using 2D TCAD simulations. The results show a 7.7 times improved resilience of the FDSOI transistor compared to that of Bulk MOSFET.