1.3 nm CMOS技术中1.6 na静态电流带隙参考

2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS) Pub Date : 2015-12-01 DOI:10.1109/ICECS.2015.7440366

Amr Kamel, S. Ibrahim

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引用次数: 0

摘要

本文提出了一种超低静态电流带隙基准电路。BGR基于无电阻拓扑结构，以减少面积和电流消耗。该设计在TSMC 130纳米CMOS技术上实现。它只消耗1.6 nA从1.8 v电源。BGR提供约770 mv参考电压，直流时电源抑制比(PSRR)为57 dB。-40 ~ 125℃范围内，温度系数为5ppm /℃。工艺差异和不匹配保持在每西格玛1.4%的低水平。

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A 1.6-nA quiescent current bandgap reference in 130-nm CMOS technology

This paper presents an ultra-low quiescent current bandgap reference. The BGR is based on a resistor-less topology to reduce area and current consumption. The proposed design was implemented in TSMC 130-nm CMOS technology. It only consumes 1.6 nA from a 1.8-V supply. The BGR provides about 770-mV reference voltage and has power supply rejection ratio (PSRR) of 57 dB at DC. The temperature coefficient (TC) is 5 ppm/°C from -40 to 125 °C. Process variation and mismatches are kept as low as 1.4% per sigma.

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2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS)

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