2022 Device Research Conference (DRC)最新文献

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Improved Endurance with Electron-Only Switching in Ferroelectric Devices 铁电器件中仅电子开关提高续航能力
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/DRC55272.2022.9855823
Zheng Wang, Nujhat Tasneem, Hang Chen, Shimeng Yu, W. Chern, A. Khan
{"title":"Improved Endurance with Electron-Only Switching in Ferroelectric Devices","authors":"Zheng Wang, Nujhat Tasneem, Hang Chen, Shimeng Yu, W. Chern, A. Khan","doi":"10.1109/DRC55272.2022.9855823","DOIUrl":"https://doi.org/10.1109/DRC55272.2022.9855823","url":null,"abstract":"We demonstrate, for the first time, endurance characteristics of ferroelectric devices (i.e. n-/p-FeFETs and n+/p+ Fe-MOSCAPs) by extracting memory windows from C-VG characteristics. By comparing ambipolar (both type of carriers) switching and unipolar (one type of carrier) switching in ferroelectric devices, we concluded that ferroelectric switching with electrons only significantly improves device endurance, and hence proposed junctionless FeFETs with n+ channel for maximizing endurance of ferroelectric memory.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"301 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131770919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
D-band frequency memristor switch based on monolayer boron nitride 基于单层氮化硼的d波段频率忆阻开关
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/drc55272.2022.9855801
Sung Jin Yang, Frank Makal, Paul Peterson, Jason Alikpala, Christopher J. Luth, S. Banerjee, Andreas Roessler, D. Akinwande
{"title":"D-band frequency memristor switch based on monolayer boron nitride","authors":"Sung Jin Yang, Frank Makal, Paul Peterson, Jason Alikpala, Christopher J. Luth, S. Banerjee, Andreas Roessler, D. Akinwande","doi":"10.1109/drc55272.2022.9855801","DOIUrl":"https://doi.org/10.1109/drc55272.2022.9855801","url":null,"abstract":"The radiofrequency (RF) switching network system has emerged as an essential future technology in the sixth generation (6G) wireless communications. Many scientists have put a great deal of effort into researching and developing 6G antennas, RF front ends, and wave propagation characterization. However, the conventional RF switches are based on solid-state diode and transistor devices. These volatile solid-state switches cause high energy consumption because they consume both dynamic (during switching) and static (in the idle state) power [1]. Here, we proposed a radiofrequency (RF) switch based on the non-volatile resistive switching (NVRS) memory effects in h-BN [2], [3]. The non-volatile h-BN RF switches consume zero static power and are more energy-efficient than the conventional ones. Specifically, this work demonstrates the switches operating in the D-band (110 – 170 GHz) for the first time, which was absent in the prior reports [4], [5].","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131910496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Tunneling transport in WSe2-MoS2 heterojunction transistor enabled by a two-dimensional device architecture 二维器件结构实现了WSe2-MoS2异质结晶体管的隧道传输
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/drc55272.2022.9855785
P. Chava, Kenji Watanabe, T. Taniguchi, T. Mikolajick, M. Helm, A. Erbe
{"title":"Tunneling transport in WSe2-MoS2 heterojunction transistor enabled by a two-dimensional device architecture","authors":"P. Chava, Kenji Watanabe, T. Taniguchi, T. Mikolajick, M. Helm, A. Erbe","doi":"10.1109/drc55272.2022.9855785","DOIUrl":"https://doi.org/10.1109/drc55272.2022.9855785","url":null,"abstract":"Heterojunctions made of two-dimensional (2D) semiconducting materials provide promising properties for the realization of tunnel field effect transistors (TFETs). The absence of dangling bonds allows the formation of sharp hetero-interfaces, which enables the reduction of parasitic components arising due to interface traps [1]. In this work, we demonstrate band-to-band tunneling (BTBT) between layers of WSe2 and MoS2 that are contacted with few-layered graphene (FLG) on both sides of the junction and completely encapsulated with hexagonal boron nitride (h-BN). Additionally, we also use the FLG as a gate electrode, which allows us to realize devices made entirely of different 2D materials. Previous reports on WSe2-MoS2 junctions showing tunneling transport use a combination of high-k dielectrics [2]–[5], ion gel dielectric[6], doped flakes[5], or different sets of contact metals[3], [4]. We observe negative differential resistance (NDR) confirming the tunneling transport in our devices without using any of the above mentioned additional fabrication steps, showing the potential in terms of further optimization.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114211877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Equivalent electrical circuit modelling of a TaOx/HfOx based RRAM with optimized resistance window and multilevel states 基于TaOx/HfOx的优化电阻窗多电平RRAM等效电路建模
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/DRC55272.2022.9855784
Tommaso Stecconi, Y. Popoff, R. Guido, M. Halter, D. F. Falcone, A. L. Porta, F. Horst, L. Bégon-Lours, M. Sousa, B. Offrein, V. Bragaglia
{"title":"Equivalent electrical circuit modelling of a TaOx/HfOx based RRAM with optimized resistance window and multilevel states","authors":"Tommaso Stecconi, Y. Popoff, R. Guido, M. Halter, D. F. Falcone, A. L. Porta, F. Horst, L. Bégon-Lours, M. Sousa, B. Offrein, V. Bragaglia","doi":"10.1109/DRC55272.2022.9855784","DOIUrl":"https://doi.org/10.1109/DRC55272.2022.9855784","url":null,"abstract":"In recent years, bilayer RRAMs based on conductive metal-oxide (CMO)/HfOx have gained ground in the field of analogue in-memory computing. Compared to conventional metal/HfOx based systems, bilayer RRAM structures show reduced switching stochasticity, enhanced symmetry of the set and reset transition, and improved endurance [1]–[3]. Despite their remarkable capabilities to implement neuromorphic systems, especially for the training of neural networks, the resistive switching mechanism, as well as the role of the CMO, is not yet fully understood [4]. In this work we developed and studied TaOx/HfOx RRAM devices, varying the TaOx properties such as the resistivity and thickness. We interpret the switching by means of a dedicated impedance spectroscopy experiment.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"352 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122844618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Nanoscale HfO2-based memristive devices for neuromorphic computing 用于神经形态计算的纳米级hfo2记忆器件
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/DRC55272.2022.9855810
S. Hoffmann‐Eifert
{"title":"Nanoscale HfO2-based memristive devices for neuromorphic computing","authors":"S. Hoffmann‐Eifert","doi":"10.1109/DRC55272.2022.9855810","DOIUrl":"https://doi.org/10.1109/DRC55272.2022.9855810","url":null,"abstract":"Redox-type memristive devices (ReRAM) based on ultrathin metal/metal oxide/metal stacks are considered as one of the most promising approaches for future high-density non-volatile data storage and beyond-von Neumann architectures, including emerging fields of storage class memory, machine learning and neuromorphic computing (NC) [1]. Fast switching events on time scales of nanoseconds combined with data retention times in the order of ten years are enabled by the nanoscale redox-type reactions in the ReRAM cells that control the addressable resistance states. Stack design and device operation in metal oxide-based valence change mechanism (VCM)-type memristive devices is understood from the perspective of oxygen transfer as well as drift/diffusion processes [2]. The realization of highly dense packed arrays seems feasible due to the inherent potential of the devices for scalability and three-dimensional integration making ReRAM cells interesting as artificial synapses in NC circuits. In the context of neuromorphic computing the accessibility of intermediate resistance states is one of the important requirements [3]. In addition, resistive switching devices with volatile resistance states are of increasing interest for implementation of NC learning rules [4]. Energy-efficient memristive devices for in-memory-computing (IMC) and next generation NC applications must fulfill requirements like compatibility with CMOS back-end-of-line (BEOL) and three-dimensional fabrication, device scalability, and operation parameters fitting to the design node of the circuitry. Hafnium oxide is one of the most promising materials for CMOS-compatible ReRAM devices. In VCM-type memristive cells, the HfO2 film sandwiched between an inert and a reactive metal electrode acts as the actively switching layer, where the resistance change occurs due to oxygen ion movement between the conductive HfOx filament and the insulating HfO2–x disc region.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"714 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132595045","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Cryogenic Memory Array based on Ferroelectric SQUID and Heater Cryotron 基于铁电SQUID和加热低温加速器的低温存储阵列
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/drc55272.2022.9855813
Shamiul Alam, Md. Mazharul Islam, M. S. Hossain, K. Ni, N. Vijaykrishnan, A. Aziz
{"title":"Cryogenic Memory Array based on Ferroelectric SQUID and Heater Cryotron","authors":"Shamiul Alam, Md. Mazharul Islam, M. S. Hossain, K. Ni, N. Vijaykrishnan, A. Aziz","doi":"10.1109/drc55272.2022.9855813","DOIUrl":"https://doi.org/10.1109/drc55272.2022.9855813","url":null,"abstract":"Cryogenic (cryo) memory devices, designed to operate at/below 4 Kelvin (K) temperature, is a prime enabler of practical quantum computing systems, and superconducting (SC) electronic platforms (Figs. 1(a), (b)) [1]. The state-of-the-art quantum algorithms require many arbitrary rotations which demand a large memory to store program instructions [2]. SC qubits (used in most of the existing quantum computing systems) are highly sensitive to noise and hence, to protect the qubit states from thermal disturbances, they are placed at a few milli-Kelvin (mK) temperature. Furthermore, to preserve the integrity of the quantum states, the SC qubits undergo continuous error correction schemes, requiring extensive memory and bandwidth [2]. Superconducting electronics (SCE) (targeted towards space applications, and high-performance computing) outperforms the conventional CMOS counterparts in terms of speed and energy-efficiency (Fig. 1(c)) [3]. Decades of research efforts have given rise to three major categories (and several sub-variants) of cryo-memories based on SC, non-SC, and hybrid technologies (Fig. 2) [2], [4]–[6]. However, the existing variants suffer from one or more of the following challenges - (i) limited scalability, (ii) process complexity, (iii) bulky peripherals, (iv) array-level interference, (v) volatility, and (vi) speed incompatibility. Therefore, a scalable cryo-memory system remains elusive. To address these existing issues, here, we present a novel cryo-memory system utilizing -(i) the polarization-induced Cooper-pair [7] modulation in a ferroelectric $(FE)$ superconducting quantum interference device (SQUID) (Fig. 3(a)) [8], and (ii) current controlled $SCleftrightarrow non-SC$ switching in a heater cryotron $(hTron)$ (Fig. 4) [4]. Discrete prototypes of these devices have been demonstrated recently, but their coupled interactions (which we harness in our work) were never explored before.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132674752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Design Space Analysis of Superconducting Nanowire-based Cryogenic Oscillators 基于超导纳米线的低温振荡器设计空间分析
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/DRC55272.2022.9855804
Md. Mazharul Islam, Shamiul Alam, N. Shukla, A. Aziz
{"title":"Design Space Analysis of Superconducting Nanowire-based Cryogenic Oscillators","authors":"Md. Mazharul Islam, Shamiul Alam, N. Shukla, A. Aziz","doi":"10.1109/DRC55272.2022.9855804","DOIUrl":"https://doi.org/10.1109/DRC55272.2022.9855804","url":null,"abstract":"Superconducting (SC) devices and circuits have been garnering immense interest in recent years. due to the emergence of several major applications that demand and justify cryogenic (cryo) cooling below 4 Kelvin temperature. Superconducting single flux quantum (SFQ) technology supports ultra-fast (hundreds of GHz) classical computing operations, far beyond the capabilities of the CMOS processors [1]. The energy demand of a recent prototype of a SC processor proved to be ~80X less than that of its semiconductor counterpart (considering cooling cost) [2]. SC devices/circuits have been used in several spacecrafts in the last few years [3]. The need to explore design prospects for SC devices/circuits has become more imperative. A Superconducting nanowire (ScNW) [4], [5] is among the most promising SC devices with possible applications in several avenues of cryogenic electronics. Recent demonstrations proved that the ScNWs can be utilized to design cryogenic oscillators [6], with possible usage in cryo-neuromorphic systems [7]. The dynamics of the ScNW oscillator is unlike any other non-SC oscillator. Hence, a systematic design space expiration is crucial to facilitate the adoption and incorporation of these unique oscillators in different avenues of cryo-electronics. In this work, we conduct a simulation-based study of the ScNW oscillators to identify the material/device-circuit co-design opportunities.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134086484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A Composite TE-TFE-FE Model for Schottky Barrier Reverse Current over the Entire Electric-Field Range 全电场范围内肖特基势垒逆流的TE-TFE-FE复合模型
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/DRC55272.2022.9855788
Wenshen Li, D. Jena, H. Xing
{"title":"A Composite TE-TFE-FE Model for Schottky Barrier Reverse Current over the Entire Electric-Field Range","authors":"Wenshen Li, D. Jena, H. Xing","doi":"10.1109/DRC55272.2022.9855788","DOIUrl":"https://doi.org/10.1109/DRC55272.2022.9855788","url":null,"abstract":"Schottky barriers in wide bandgap (WBG) semiconductors can sustain very large electric fields under reverse bias due to the access of very large barrier heights (>1 eV) and the very high intrinsic breakdown field (>3 MV/cm) of WBG semiconductors [1]. Under high surface electric-fields (E), the ideal reverse-bias leakage current (JR) is dominated by barrier tunneling rather than thermionic emission (TE), thus thermionic-field-emission (TFE) or field-emission (FE) becomes the dominant mechanism [1] [2]. Therefore, to accurately describe the reverse current over the entire surface electric-field range, TFE and FE models are required in addition to the TE model.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127854724","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhanced Drain Current in Transient Mode due to Long Ionization Time of Shallow Impurities at 4 K in 65-nm bulk Cryo CMOS Transistors 65纳米块体低温CMOS晶体管中4 K时较长电离时间导致瞬态漏极电流增强
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/DRC55272.2022.9855815
Tomohisa Miyao, Takahisa Tanaka, Itsuki Imanishi, Masayuki Ichikawa, S. Nakagawa, H. Ishikuro, T. Sakamoto, M. Tada, K. Uchida
{"title":"Enhanced Drain Current in Transient Mode due to Long Ionization Time of Shallow Impurities at 4 K in 65-nm bulk Cryo CMOS Transistors","authors":"Tomohisa Miyao, Takahisa Tanaka, Itsuki Imanishi, Masayuki Ichikawa, S. Nakagawa, H. Ishikuro, T. Sakamoto, M. Tada, K. Uchida","doi":"10.1109/DRC55272.2022.9855815","DOIUrl":"https://doi.org/10.1109/DRC55272.2022.9855815","url":null,"abstract":"Despite the importance of cryo CMOS technologies in quantum computing systems, the transient behaviors of cryo MOS transistors have been less studied. In this work, in advanced CMOS transistors we observed sub-us transient drain current $(I_{mathrm{d}}^{text{Trans}})$ that was much greater than the static drain current $(I_{mathrm{d}}^{text{Static}})$ at 4 K (Fig. 6); the transient-to-static ratio $requiv I_{mathrm{d}}^{text{Trans}}/I_{mathrm{d}}^{text{Static}}$ reached as large as 2.7 (Fig. 9), whereas $r$ stays at one in the same device at 20 K. The observed transient characteristics are not due to the self-heating effects, but due to the long emission time of holes from acceptors at 4 K. After applying biases, more electrons flow into the channel than those in static conditions to mitigate the frozen acceptors. $I_{mathrm{d}}^{text{Trans}}$. goes down to $I_{mathrm{d}}^{text{Static}}$ because of gradual ionization of acceptors. We consider that the observed transient behavior needs to be considered in cryo MOSFET model to accurately design cryo LSI circuits.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130738349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Unleashing the Potential of Integrated Ferroelectric Devices with Hafnium Oxide 释放氧化铪集成铁电器件的潜力
2022 Device Research Conference (DRC) Pub Date : 2022-06-26 DOI: 10.1109/DRC55272.2022.9855802
T. Mikolajick, U. Schroeder, S. Slesazeck
{"title":"Unleashing the Potential of Integrated Ferroelectric Devices with Hafnium Oxide","authors":"T. Mikolajick, U. Schroeder, S. Slesazeck","doi":"10.1109/DRC55272.2022.9855802","DOIUrl":"https://doi.org/10.1109/DRC55272.2022.9855802","url":null,"abstract":"Early ferroelectric materials discovered more than 100 years ago like Rochelt salt were too unstable for widespread applications. Perovskite ferroelectrics like BaTiO3 (BTO) and later PbZrxTi1-x O3 (PZT) opened the path for widespread applications. Fist memory devices based on cross-point arrays involving BaTiO3 were proposed in the early 1950s [1]. However, it was not until semiconductor technology became mature that the first integrated capacitor-based memories involving PZT ferroelectrics became available in 1993 [2]. Ferroelectric memories remained a niche market due to the complexity of integrating oxide perovskites into CMOS and the related slow scaling. In 2011 Boescke et al. [3] published the observation of ferro electricity in hafnium oxide. This new material system has strongly increased the possibility to integrate ferroelectric functionalities into CMOS processes in the following years. Fig. 1 illustrates this development by showing the publication activity on the topic of “ferroelectric memory”.","PeriodicalId":200504,"journal":{"name":"2022 Device Research Conference (DRC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115374556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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