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CMOS Multi-Frequency Lock-in Sensor for Impedance Spectroscopy in Microbiology Applications CMOS多频锁相传感器在微生物学阻抗谱中的应用
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842207
S. N. Hosseini, Vahid Khojasteh Lazarjan, M. Akram, B. Gosselin
{"title":"CMOS Multi-Frequency Lock-in Sensor for Impedance Spectroscopy in Microbiology Applications","authors":"S. N. Hosseini, Vahid Khojasteh Lazarjan, M. Akram, B. Gosselin","doi":"10.1109/NEWCAS52662.2022.9842207","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842207","url":null,"abstract":"This paper presents the design of a CMOS lock-in amplifier (LIA) encapsulated with an impedance sensor for microbial monitoring applications. The custom integrated LIA is designed and fabricated in a 0.18-µm CMOS technology. It includes a fully differential switched-capacitor transimpedance amplifier as the main building block of the lock-in amplifier. In this design, chopper stabilization is used in the capacitive transimpedance amplifier to reduce the noise and improve the sensor's sensitivity. The proposed LIA contains a band-pass filter with 0.88 quality factor to pass signals at selectable center frequencies of 1, 2, 4, and 10 kHz; a programmable gain amplifier, a mixer, and a low-pass filter to extract impedance changes caused by microorganism growth at different frequencies. The transimpedance amplifier has a gain of 54.86 dB, and an input-referred noise of 58 pA/√Hz at 1 kHz. The whole sensor has a sensitivity of 240 mV/nA. It consumes a power of 817.56 µW from a 1.8V power supply and has a total harmonic distortion of -72.7 dB.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125545419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design of an Energy Efficient Analog Two-Quadrant Multiplier Cell Operating in Weak Inversion 一种工作于弱反转的高能效模拟二象限倍增器单元的设计
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842251
Raphael Nägele, Jakob Finkbeiner, M. Grözing, M. Berroth
{"title":"Design of an Energy Efficient Analog Two-Quadrant Multiplier Cell Operating in Weak Inversion","authors":"Raphael Nägele, Jakob Finkbeiner, M. Grözing, M. Berroth","doi":"10.1109/NEWCAS52662.2022.9842251","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842251","url":null,"abstract":"Analog low precision arithmetic circuits offer a significantly higher energy efficiency than their digital counterparts, which makes them ideally suited for low precision neuromorphic processing circuits. An analog two-quadrant multiplier cell consisting of only two MOSFETs with multi-bit resolution is presented. It operates in weak inversion with the back-gate used as multiplicator input consuming less than 1 fJ per operation. A 22 nm FD-SOI CMOS technology is used for simulations.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"258 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116031499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
NEWCAS 2022 Breaker Page NEWCAS 2022断路器页
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842135
{"title":"NEWCAS 2022 Breaker Page","authors":"","doi":"10.1109/NEWCAS52662.2022.9842135","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842135","url":null,"abstract":"","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122595623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Activity-Adaptive Architectures for Energy-Efficient Scalable Neural Recording Microsystems: A Review of Current and Future Directions 节能可扩展神经记录微系统的活动自适应架构:当前和未来方向的回顾
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842182
Mina Sayedi, Hossein Kassiri
{"title":"Activity-Adaptive Architectures for Energy-Efficient Scalable Neural Recording Microsystems: A Review of Current and Future Directions","authors":"Mina Sayedi, Hossein Kassiri","doi":"10.1109/NEWCAS52662.2022.9842182","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842182","url":null,"abstract":"Wireless transmission of the recorded neural data without exceeding the extremely-limited available power is one of the most significant challenges in developing implantable brain neural interfaces, particularly for systems with higher channel count. Several generic and application-specific data reduction methods have been proposed in the literature with various levels of success in improving energy efficiency while preserving signal integrity. In this paper, we will review different approaches reported and will discuss their advantages and disadvantages. We will also discuss the opportunity that neural ADCs offer recently-reported in realizing an activity-dependent adaptive-resolution fully-dynamic-power neural recording architecture capable of near-loss-less data compression while reducing the required power for both recording and transmission.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121986480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Self-Timed Ring Oscillators for Non-Overlapping and Overlapping Phases Synthesis 用于非重叠相位和重叠相位合成的自定时环振荡器
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9901390
Hasan Moussa, Sana Ibrahim, E. Lauga-Larroze, F. Podevin, S. Bourdel, L. Fesquet
{"title":"Self-Timed Ring Oscillators for Non-Overlapping and Overlapping Phases Synthesis","authors":"Hasan Moussa, Sana Ibrahim, E. Lauga-Larroze, F. Podevin, S. Bourdel, L. Fesquet","doi":"10.1109/NEWCAS52662.2022.9901390","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9901390","url":null,"abstract":"This paper reports a robust methodology to design high accuracy and low noise multiphase clock generators based on Self-Timed Ring Oscillators (STRO). A novel algorithm generating from an STRO any number of Overlapping or Non-Overlapping phases is described. A VHDL package integrating the analog behavior of the STRO has been written to evaluate and simulate the proposed algorithms. In order to demonstrate the effectiveness of this algorithm, these clock generators have been designed in 28 nm FDSOI technology. The simulations show compatibility between the digital simulations and the transistor level simulations.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128368862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 3.3 V 0.1–1 A Hybrid Buck-Boost Converter with 85–97 % Power Efficiency Range Highly-Suited for Battery-Powered Devices using Low-Profile High-DCR Inductor 3.3 V 0.1-1 A混合降压-升压转换器，功率效率范围为85 - 97%，非常适合使用低规格高dcr电感的电池供电设备
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842141
V. Nguyen, Xuan-Dien Do, Y. Blaquière, G. Cowan
{"title":"A 3.3 V 0.1–1 A Hybrid Buck-Boost Converter with 85–97 % Power Efficiency Range Highly-Suited for Battery-Powered Devices using Low-Profile High-DCR Inductor","authors":"V. Nguyen, Xuan-Dien Do, Y. Blaquière, G. Cowan","doi":"10.1109/NEWCAS52662.2022.9842141","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842141","url":null,"abstract":"Conventional four-switch buck-boost converter (FBBC) has been widely used for battery-powered portable devices when a voltage between the min and max voltages of the battery is needed. However, its power efficiency is limited because of high conduction and switching losses. In this paper, a power-efficient hybrid buck-boost converter (HBUBOC) is presented. The proposed HBUBOC reduces RON and DRC conduction loss, and switching loss simultaneously, thus, achieving high efficiency in both the buck and boost modes, over a wide range of conversion. The proposed HBUBOC achieved a max/min efficiency up to 97/85.43 % over a load current of 0.1-1 A and input voltage of 2.5-5.5 V at 3.3 V output voltage. This performance can be considered as the highest over both buck and boost modes compared to the most recent reported state-of-the-art counterparts if same switches and low-profile high-DCR inductor are used.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129000580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analog Spiking Neuron in 28 nm CMOS 28纳米CMOS模拟脉冲神经元
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842088
Marwan Besrour, Sarra Zitoun, Jacob Lavoie, Takwa Omrani, K. Koua, Maher Benhouria, Mounir Boukadoum, R. Fontaine
{"title":"Analog Spiking Neuron in 28 nm CMOS","authors":"Marwan Besrour, Sarra Zitoun, Jacob Lavoie, Takwa Omrani, K. Koua, Maher Benhouria, Mounir Boukadoum, R. Fontaine","doi":"10.1109/NEWCAS52662.2022.9842088","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842088","url":null,"abstract":"Traditional computer clusters are facing a significant limitation as a result of the big data revolution. We need efficient edge devices to bring the power of machine learning algorithms from power-hungry room servers to mobile consumer platforms. Neuromorphic engineering is a promising avenue for developing the next generation of edge devices that combine high computing capabilities with low power consumption in a small form factor. This paper shows the proof of concept of an analog/mixed-signal CMOS neuromorphic system on a chip (NeuroSoC) by presenting a low-power design of a leaky integrate-and-fire (LIF) neuron. The design uses eight transistors and two capacitors for low complexity and potential to lead to very dense systems. The proposed model consumes 1.2 fJ/spike and occupies an active area of 6.73 µm by 5.09 µm when implemented in 28 nm CMOS. The maximum spiking frequency is 343 kHz.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123840048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Pulse-Based, Multi-Beam Optical Link for Data Telemetry to Implantable Biomedical Microsystems 用于植入式生物医学微系统数据遥测的脉冲多光束光链路
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842007
H. Alizadeh, Y. Koolivand, A. M. Sodagar
{"title":"Pulse-Based, Multi-Beam Optical Link for Data Telemetry to Implantable Biomedical Microsystems","authors":"H. Alizadeh, Y. Koolivand, A. M. Sodagar","doi":"10.1109/NEWCAS52662.2022.9842007","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842007","url":null,"abstract":"This paper reports on a multi-channel, high-rate optical transcutaneous link for data telemetry to implantable microsystems. The proposed optical data telemetry link employs four optical transmitter-receiver pairs operating in parallel at 405, 655, 850, and 940 nm making it able to transmit four independent data streams. A proof-of-concept prototype is developed using a laser diode, three light-emitting diodes and four photodiodes with minimally-overlapping spectral responsivities. The prototype also includes driver circuits for optical transmitters as well as receiver circuits, implemented using off-the-shelf components. According to experimental results with real tissues as the transmission medium, the proposed link allows for achieving data rates up to a total of 130 Mbps with a bit error rate (BER) of better than 10−6.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123675430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Novel Ultra-Wideband Low-Noise Amplifier Using an Extended Bandwidth RLC Topology 一种基于扩展带宽RLC拓扑的新型超宽带低噪声放大器
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842016
Saeed Ghaneei Aarani, M. Mehranpouy, B. Gosselin
{"title":"A Novel Ultra-Wideband Low-Noise Amplifier Using an Extended Bandwidth RLC Topology","authors":"Saeed Ghaneei Aarani, M. Mehranpouy, B. Gosselin","doi":"10.1109/NEWCAS52662.2022.9842016","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842016","url":null,"abstract":"In this paper, a novel circuit technique is presented to extend the bandwidth of an ultra-wideband (UWB) low-noise amplifier (LNA). The proposed circuit consists of a standard symmetric center-tapped inductor and an RC series network that is connected to the center-tapped pin. Removing the series resistor in the shunt-peaking method allows increasing the headroom voltage of the LNA. Consequently, the DC current can be increased to benefit from larger S21. A differential common-gate LNA using the presented circuit is implemented in a CMOS 0.18-μm TSMC technology. The LNA operates from 4.33 GHz up to 13.9 GHz while is 11.3±0.5 dB and is less than -10 dB over the whole of the bandwidth. Furthermore, the LNA using a combination of the proposed approach and a conventional cross-coupled capacitor (CCC) technique achieves a minimum noise figure (NF) of 3.84 dB. Post-layout simulation shows power dissipation of 2.5 mW, while the supply voltage is 0.75 V.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114630857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Earbud-Based UWB Data Link for Multichannel Brain Neural Recording and Stimulation Interfaces 基于耳塞的多通道脑神经记录和刺激接口的超宽带数据链路
2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI: 10.1109/NEWCAS52662.2022.9842236
R. Saha, S. Mirbozorgi
{"title":"Earbud-Based UWB Data Link for Multichannel Brain Neural Recording and Stimulation Interfaces","authors":"R. Saha, S. Mirbozorgi","doi":"10.1109/NEWCAS52662.2022.9842236","DOIUrl":"https://doi.org/10.1109/NEWCAS52662.2022.9842236","url":null,"abstract":"This paper proposes a novel earbud-based wireless Ultra-Wideband (UWB) data link consisting of an implantable transmitter (Tx) and an earbud-based wearable receiver (Rx) antennas. The Tx UWB antenna is an implant and designed to be located in the backside of the ear, right beneath the skin and close to the Rx antenna. The Rx antenna is designed to be formed around a standard earbud, which is 1) convenient to align it with the Tx antenna for long-term and frequent usages and 2) barely noticeable (avoiding any wearables on top of or around the head). The proposed UWB link is modeled and simulated with ANSYS HFSS, including the human head-ear inhomogeneous realistic tissue model. The performance of the proposed UWB link is evaluated (using HFSS) that confirms 1) return losses < −10dB, 2) the link frequency response > −40 dB at the targeted frequency range (3.6 to 6.8 GHz), 3) the appropriate location of Rx antenna for absorbing radiated Electromagnetic field generated by Tx antenna, and 4) the average specific absorption rate (SAR) < 1.41 W/kg with transmitted power of 5 mW. In addition, the placement of the Rx antenna is examined under two tilted conditions of 0° and 15°, which ensures the robustness of the proposed design against typical angular misalignment during earbud-wearing. The link feasibility is verified by calculating the required worst-case receiver sensitivity of −39.52 dBm.","PeriodicalId":198335,"journal":{"name":"2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124101884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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