一种工作于弱反转的高能效模拟二象限倍增器单元的设计

2022 20th IEEE Interregional NEWCAS Conference (NEWCAS) Pub Date : 2022-06-19 DOI:10.1109/NEWCAS52662.2022.9842251

Raphael Nägele, Jakob Finkbeiner, M. Grözing, M. Berroth

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引用次数: 2

摘要

模拟低精度算术电路比数字电路提供更高的能量效率，这使得它们非常适合低精度神经形态处理电路。提出了一种仅由两个mosfet组成的多比特分辨率模拟二象限乘法器单元。它在弱反转中工作，后门用作乘法器输入，每次操作消耗小于1 fJ。模拟采用22 nm FD-SOI CMOS技术。

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Design of an Energy Efficient Analog Two-Quadrant Multiplier Cell Operating in Weak Inversion

Analog low precision arithmetic circuits offer a significantly higher energy efficiency than their digital counterparts, which makes them ideally suited for low precision neuromorphic processing circuits. An analog two-quadrant multiplier cell consisting of only two MOSFETs with multi-bit resolution is presented. It operates in weak inversion with the back-gate used as multiplicator input consuming less than 1 fJ per operation. A 22 nm FD-SOI CMOS technology is used for simulations.

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2022 20th IEEE Interregional NEWCAS Conference (NEWCAS)

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