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2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)最新文献

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High Crystalline Quality of Si0.5 Ge0.5 Layer Grown on a Novel Three-layer Strain Relaxed Buffer 在新型三层应变松弛缓冲材料上生长高结晶质量的Si0.5 Ge0.5层
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754356
Zhiqian Zhao, Yongliang Li, Guilei Wang, Yan Li, Wenwu Wang
{"title":"High Crystalline Quality of Si0.5 Ge0.5 Layer Grown on a Novel Three-layer Strain Relaxed Buffer","authors":"Zhiqian Zhao, Yongliang Li, Guilei Wang, Yan Li, Wenwu Wang","doi":"10.1109/EDSSC.2019.8754356","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754356","url":null,"abstract":"A novel three-layer graded SiGe strain relaxed buffer, whose Ge concentration increased from bottom to top by roughly 10% with an in-situ annealing after each layer grown, is developed to effectively constrain the threading dislocation and attain a high crystalline quality of Si<inf>0.5</inf> Ge<inf>0.5</inf> layer. Moreover, a chemical mechanical planarization step can be applied to the strain relaxed buffer to further improve the surface roughness and crystalline quality of Si<inf>0.5</inf> Ge<inf>0.5</inf> layer. So, a high crystal quality and atomically smooth surface Si<inf>0.5</inf> Ge<inf>0.5</inf> layer can be successfully realized. Meanwhile, this novel three-layer graded SiGe strain relaxed buffer also can increase the critical thickness of Si<inf>0.5</inf> Ge<inf>0.5</inf> from less than 20nm to at least 50 nm and attain 0.6% compressive strain for Si<inf>0.5</inf> Ge<inf>0.5</inf> layer by utilizing the scanning moiré fringe imaging technique.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115105697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Improvement of BCP/MoO3 Composite Cathode Buffer Layer on the Performances of Organic Photodetectors BCP/MoO3复合阴极缓冲层对有机光电探测器性能的改善
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754227
Xinying Liu, T. An, Wei Gong
{"title":"Improvement of BCP/MoO3 Composite Cathode Buffer Layer on the Performances of Organic Photodetectors","authors":"Xinying Liu, T. An, Wei Gong","doi":"10.1109/EDSSC.2019.8754227","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754227","url":null,"abstract":"In this paper, bulk heterojunction organic photodetectors based on P3HT: PC61 BM as the active layer were fabricated and the effects of BCP/MoO3 composite cathode buffer layers on the photoelectric properties of the devices were also investigated. The results show that the wide bandgap BCP has a good blocking effect on the holes in the BCP/MoO3 buffer layer structure, which reduces the dark current and contacts with MoO3 to produce a built-in electric field conducive to electron transport and further improve the photocurrent, thus increasing the specific detectivity. The resulting organic photodetector shows a 1.33 $times 10^{11}$ Jones specific detectivity at a reverse bias of 0.5 V under 515 nm (3 mw/cm2) illumination.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123539772","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electron-Beam Evaporated Nb2O5/MgF2 Bilayers for One-Dimentional Photonic Crystals Applications 电子束蒸发Nb2O5/MgF2双分子层在一维光子晶体中的应用
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754425
Jing-Jenn Lin, Bo-Syuan Chen, Jyum-Ming Jhang, Cheng-Fu Yang, You-Lin Wu
{"title":"Electron-Beam Evaporated Nb2O5/MgF2 Bilayers for One-Dimentional Photonic Crystals Applications","authors":"Jing-Jenn Lin, Bo-Syuan Chen, Jyum-Ming Jhang, Cheng-Fu Yang, You-Lin Wu","doi":"10.1109/EDSSC.2019.8754425","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754425","url":null,"abstract":"In this paper, we reported a high reflective one-dimensional (1D) photonic crystal (PhC) fabricated by using electron-beam (e-beam) evaporation process. The 1D PhC has a structure of periodical arrangement of Nb<inf>2</inf>O<inf>5</inf>/MgF<inf>2</inf> bilayers. By controlling the number of the bilayer pairs, the center wavelengths ($lambda_{0}$) of the reflected light can be adjusted close to 450 nm or 500 nm. It is found that the peak reflectivity can be up to 90% for the PhC with 4 or 6 Nb<inf>2</inf>O<inf>5</inf>/MgF<inf>2</inf> bilayer pairs. The stop band width is approximate 150 nm.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125946015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An 8-bit, 8-GS/s Equivalent Sampling Time Domain Analog-to-digital Converter 一个8位，8-GS/s等效采样时域模数转换器
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754327
Yu Zhu, Maliang Liu, Zhangming Zhu
{"title":"An 8-bit, 8-GS/s Equivalent Sampling Time Domain Analog-to-digital Converter","authors":"Yu Zhu, Maliang Liu, Zhangming Zhu","doi":"10.1109/EDSSC.2019.8754327","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754327","url":null,"abstract":"The paper proposes an 8-bit, 8-GS/s time domain analog-to-digital converter (TD-ADC) with equivalent time sampling technology. The prototype was fabricated in 65 nm CMOS technology. This ADC has a high area efficiency. The core area of the chip is only $320 mu {mathrm{m} times 300mathrm{m}}$. The measured SFDR and SNDR are over 43.0 dB and 57.6 dB with a Nyquist input.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129887445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Power Estimation of Embedded SRAMs using BIST Algorithms 基于BIST算法的嵌入式sram功率估计
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754261
Yang Zhao, Lan Chen
{"title":"Power Estimation of Embedded SRAMs using BIST Algorithms","authors":"Yang Zhao, Lan Chen","doi":"10.1109/EDSSC.2019.8754261","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754261","url":null,"abstract":"As more and more memories are used on a chip for graphic rendering and cloud computing purpose, power estimation of memories in a chip on an automatic test equipment (ATE) without the aid of functional patterns is a rarely new practice. Power dissipated by embedded SRAMs under normal operation is critical to power estimation. This paper describes a method that utilizes memory BIST architecture and algorithms to mimic the normal functional operation of embedded SRAMs with various lengths, in order to estimate power consumption as early as wafer level in an ATE environment.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127504995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 4-Tap CMOS lock-in modulator with Anti-Interference and Background Canceling for Solid-State Long-Range LiDAR 一种用于固态远程激光雷达的具有抗干扰和背景抵消功能的4抽头CMOS锁相调制器
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754009
Shuyu Lei, Shanzhe Yu, Bing Zhang, Guocai Wang, Li Geng
{"title":"A 4-Tap CMOS lock-in modulator with Anti-Interference and Background Canceling for Solid-State Long-Range LiDAR","authors":"Shuyu Lei, Shanzhe Yu, Bing Zhang, Guocai Wang, Li Geng","doi":"10.1109/EDSSC.2019.8754009","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754009","url":null,"abstract":"In this paper, we present a 4-Tap CMOS lock-in modulator designed for solid-state long-range LiDAR. The proposed lock-in modulator is based on a pinned photodiode structure with non-uniform doping and double TX structure for each tap. With a specially designed high dynamic range, the pixel array is able to get 3D depth information of objects for both long and short range with anti-interference and background canceling.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128902013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Novel Enhancement-Mode AlGaN/GaN HFET with Double-Barrier Gates-Separating Groove 一种新型双势垒栅极分离槽增强模式AlGaN/GaN HFET
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754371
Xingchang Fu, Y. Lv, Li-Jiang Zhang, Xian-jie Li, Tong Zhang
{"title":"A Novel Enhancement-Mode AlGaN/GaN HFET with Double-Barrier Gates-Separating Groove","authors":"Xingchang Fu, Y. Lv, Li-Jiang Zhang, Xian-jie Li, Tong Zhang","doi":"10.1109/EDSSC.2019.8754371","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754371","url":null,"abstract":"In this paper, a novel enhancement-mode AlGaN/GaN double-barrier gates-separating groove heterostructure field-effect transistor (DB-GSG HFET) is proposed, in which two block barriers exist among the three gates as realized by dry etching. Because of the shielding effect of drain-side block barrier on drain voltage, the source-side block barrier is almost unaffected by drain voltage in the DBGSG HFET. As a result, the electrical characteristics of the DB-GSG HFET are improved obviously, compared with the gates-separating groove (GSG) HFET which has only one single block barrier between double gates.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130522386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A New Multilevel Interpolated TDC Method Based on a Two-Step Synchronizer 一种新的基于两步同步器的多电平插值TDC方法
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754482
Dahe Liu, Xueyou Shi, Guangyi Chen, Wengao Lu, Zhongiian Chen
{"title":"A New Multilevel Interpolated TDC Method Based on a Two-Step Synchronizer","authors":"Dahe Liu, Xueyou Shi, Guangyi Chen, Wengao Lu, Zhongiian Chen","doi":"10.1109/EDSSC.2019.8754482","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754482","url":null,"abstract":"A new multi-level time-to-digital converter (TDC) method capable of reaching high linearity and long dynamic range is presented in this paper. The method is based on a coarse counter and a two-level interpolator with a two-step synchronizer. This method solves the misalignment problem and guarantees synchronized and compatible total results. The synchronizer avoids the meta stability problem. With simulated 45% reduced minimum unit delay, the compensating delay line is shortened in coarse residue restoration. This work could be easily assembled in a multi-channel TDC chip and is aimed for applications such as APD based 3-D ranging.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127846294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Extracting Keywords from Short Government Documents Using Reinforcement Learning 利用强化学习从政府短文件中提取关键词
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754386
Huimin Cai, Ranran Chen, Xiang Li, Qilin Mu
{"title":"Extracting Keywords from Short Government Documents Using Reinforcement Learning","authors":"Huimin Cai, Ranran Chen, Xiang Li, Qilin Mu","doi":"10.1109/EDSSC.2019.8754386","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754386","url":null,"abstract":"In this paper, we proposed a novel approach to extract keywords from massive amount of unlabelled short government documents using reinforcement learning. To guide policy network to keep important words, we introduced the average rate regularization, as the sparsity constraints of the model’s loss function. Analysis on the results shows that the proposed model outperforms the traditional unsupervised keyword extraction approaches on massive amount of unlabelled government document headlines.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128024960","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Non-Ohmic Normally-off GaN RB-MISHEMT Featuring a Gate-Controlled Schottky Tunnel Junction 具有门控肖特基隧道结的非欧姆常关GaN RB-MISHEMT
2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) Pub Date : 2019-06-01 DOI: 10.1109/EDSSC.2019.8754217
Xiyuan Liu, Yijun Shi, Chen Wanjun, Shan Wu, Chao Liu, Tangsheng Chen, Bo Zhang
{"title":"A Non-Ohmic Normally-off GaN RB-MISHEMT Featuring a Gate-Controlled Schottky Tunnel Junction","authors":"Xiyuan Liu, Yijun Shi, Chen Wanjun, Shan Wu, Chao Liu, Tangsheng Chen, Bo Zhang","doi":"10.1109/EDSSC.2019.8754217","DOIUrl":"https://doi.org/10.1109/EDSSC.2019.8754217","url":null,"abstract":"In this work, we present a non-Ohmic GaN RBMISHEMTs with a gate-controlled Schottky tunnel junction at source electrode. The thick Schottky tunnel barrier at the source electrode enables the device with enhancement mode operation, and the insulated gate close to Schottky-contact source is used to control the effective width of the tunnel barrier. When a positive gate bias is applied, the barrier width will be reduced, subsequently enhancing the tunneling probability. The Schottky-contact structure at the drain electrode can make the device be capable of unidirectional conduction. It is demonstrated by the simulated results that the proposed device can possess a low off-state leakage current and a low onset voltage at same time. Meanwhile, due to absence of Au-based Ohmic process, the device can be compatible with CMOS process and can also be manufactured at a lower temperature.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126886924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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