{"title":"一种新的基于两步同步器的多电平插值TDC方法","authors":"Dahe Liu, Xueyou Shi, Guangyi Chen, Wengao Lu, Zhongiian Chen","doi":"10.1109/EDSSC.2019.8754482","DOIUrl":null,"url":null,"abstract":"A new multi-level time-to-digital converter (TDC) method capable of reaching high linearity and long dynamic range is presented in this paper. The method is based on a coarse counter and a two-level interpolator with a two-step synchronizer. This method solves the misalignment problem and guarantees synchronized and compatible total results. The synchronizer avoids the meta stability problem. With simulated 45% reduced minimum unit delay, the compensating delay line is shortened in coarse residue restoration. This work could be easily assembled in a multi-channel TDC chip and is aimed for applications such as APD based 3-D ranging.","PeriodicalId":183887,"journal":{"name":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A New Multilevel Interpolated TDC Method Based on a Two-Step Synchronizer\",\"authors\":\"Dahe Liu, Xueyou Shi, Guangyi Chen, Wengao Lu, Zhongiian Chen\",\"doi\":\"10.1109/EDSSC.2019.8754482\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new multi-level time-to-digital converter (TDC) method capable of reaching high linearity and long dynamic range is presented in this paper. The method is based on a coarse counter and a two-level interpolator with a two-step synchronizer. This method solves the misalignment problem and guarantees synchronized and compatible total results. The synchronizer avoids the meta stability problem. With simulated 45% reduced minimum unit delay, the compensating delay line is shortened in coarse residue restoration. This work could be easily assembled in a multi-channel TDC chip and is aimed for applications such as APD based 3-D ranging.\",\"PeriodicalId\":183887,\"journal\":{\"name\":\"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)\",\"volume\":\"83 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2019.8754482\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2019.8754482","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A New Multilevel Interpolated TDC Method Based on a Two-Step Synchronizer
A new multi-level time-to-digital converter (TDC) method capable of reaching high linearity and long dynamic range is presented in this paper. The method is based on a coarse counter and a two-level interpolator with a two-step synchronizer. This method solves the misalignment problem and guarantees synchronized and compatible total results. The synchronizer avoids the meta stability problem. With simulated 45% reduced minimum unit delay, the compensating delay line is shortened in coarse residue restoration. This work could be easily assembled in a multi-channel TDC chip and is aimed for applications such as APD based 3-D ranging.