Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI)最新文献_第2页

Design for testability issues in the implementation of sequential array architectures 顺序阵列架构的可测试性设计

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291254

G. Bezzi, C. Bolchini, I. Bolzoni, S. Cantu, F. Fummi, D. Sciuto

引用次数: 3

The effect of defect clustering on WASP device yields 缺陷聚类对WASP器件成品率的影响

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291261

C. Peacock, H. Bolouri

引用次数: 2

Yield enhancement in the routing phase of integrated circuit layout synthesis 集成电路布置图合成布线阶段的良率提高

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291264

A. Tyagi, M. Bayoumi, P. Manthravadi

引用次数: 3

Diagnosis of reconfigurable two-dimensional arrays using a scan approach 可重构二维阵列的扫描诊断

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291253

J. Salinas, F. Lombardi

引用次数: 3

Test and reconfiguration experiments for a defect-tolerant large area monolithic multiprocessor system 一种容错大面积单片多处理器系统的测试与重构实验

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291242

J. Otterstedt, Hiroshi Iden, M. Kuboschek

{"title":"Test and reconfiguration experiments for a defect-tolerant large area monolithic multiprocessor system","authors":"J. Otterstedt, Hiroshi Iden, M. Kuboschek","doi":"10.1109/ICWSI.1994.291242","DOIUrl":"https://doi.org/10.1109/ICWSI.1994.291242","url":null,"abstract":"The results of test and self-configuration of an experimental large area chip are described. The chip features all the logic required for the global test and configuration of a coarse-grained MIMD multiprocessor system. These structures are implemented on the 16 cm/sup 2/ Large Area Integrated Circuit 1 (LAIC 1). This chip utilizes different redundancy and reconfiguration concepts: 1) A defect-tolerant configuration network provides the connections of the modules. 2) System access is provided by a multiple-defect tolerant unidirectional scan path. 3) A repair of the primary I/O-buses is performed by programming laser fuses and anti-fuses. 4) The use of TMR for system clock and dual-rail signals for control lines enables an initial access to the system without laser repair. The results presented in this paper show, that all the proposed redundancy and reconfiguration concepts together provide a suitable scheme for the test and configuration of a large area chip containing coarse-grained modules with high module connectivity. These schemes have been proven to work even under adverse conditions such as large defects and high defect densities.<<ETX>>","PeriodicalId":183733,"journal":{"name":"Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI)","volume":"340 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134153782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

Yield enhancement architecture of WSI cube-connected cycle WSI立方体连接循环良率增强体系结构

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291263

S. Horiguchi, S. Fukuda

引用次数: 4

3D-WASP devices for on-line signal and data processing 用于在线信号和数据处理的3D-WASP设备

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291265

S. Hedge, C. Habiger, R. Lea

引用次数: 5

Optimal balancing of acyclic and cyclic data flow graphs in high level architectural synthesis environment 高层建筑综合环境中非循环和循环数据流图的最优平衡

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291247

A. Antola, F. Distante

引用次数: 1

A computer-aided tool for multichip module package design 多芯片模块封装设计的计算机辅助工具

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291260

P. Katragadda, S. Bhattacharya, I. Grosse

引用次数: 0

FERMI/spl minus/a new generation of electronic modules for large data acquisition arrays required by high energy physics FERMI/spl负/高能物理所需的大型数据采集阵列的新一代电子模块

Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI) Pub Date : 1994-01-19 DOI: 10.1109/ICWSI.1994.291246

A. Dell'Acqua, H. Alexanian, C. Alippi, G. Appelquist, P. Bailly, R. Benetta, S. Berglund, J. Bezamat, F. Blouzon, C. Bohm, L. Breveglieri, S. Brigati, P. Carlson, P. Cattaneo, L. Dadda, J. David, M. Engstrom, G. Fumagalli, U. Gatti, J. Genat, V. Goggi, S. Gong, M. Hansen, H. Hentzell, I. Hoglund, S. Inkinen, A. Kerek, O. LeDortz, B. Lofstedt, F. Maloberti, P. Nayman, A. Odmark, V. Piuri, G. Polesello, F. Salice, N. Sami, A. Savoy-Navarro, R. Stefanelli, R. Sundblad, C. Svensson, G. Torelli, J. Vanuxem, N. Yamdagni, J. Yuan

{"title":"FERMI/spl minus/a new generation of electronic modules for large data acquisition arrays required by high energy physics","authors":"A. Dell'Acqua, H. Alexanian, C. Alippi, G. Appelquist, P. Bailly, R. Benetta, S. Berglund, J. Bezamat, F. Blouzon, C. Bohm, L. Breveglieri, S. Brigati, P. Carlson, P. Cattaneo, L. Dadda, J. David, M. Engstrom, G. Fumagalli, U. Gatti, J. Genat, V. Goggi, S. Gong, M. Hansen, H. Hentzell, I. Hoglund, S. Inkinen, A. Kerek, O. LeDortz, B. Lofstedt, F. Maloberti, P. Nayman, A. Odmark, V. Piuri, G. Polesello, F. Salice, N. Sami, A. Savoy-Navarro, R. Stefanelli, R. Sundblad, C. Svensson, G. Torelli, J. Vanuxem, N. Yamdagni, J. Yuan","doi":"10.1109/ICWSI.1994.291246","DOIUrl":"https://doi.org/10.1109/ICWSI.1994.291246","url":null,"abstract":"The Front End Readout MIcrosystem, FERMI, is a representative of a new generation of data acquisition modules which utilizes modern design techniques to achieve a high acquisition rate together with intelligent on-line data processing. FERMI is being designed to satisfy the extreme requirements set by calorimeters in the next generation of particle physics detectors. Such detectors are being designed for the future LHC and SSC accelerators at CERN in Switzerland and at the SSC-laboratory in Texas. The calorimeters demand frequent (67 MHz for LHC, 63.5 MHz for SSC) high precision sampling of a large number of input channels (about 5x10/sup 5/). Each FERMI module serves 9 channels from which samples are AD-converted, corrected and temporarily stored in a local memory. The data is also merged into a trigger sum processed by digital filters to recover time of incidence and amplitude of incoming pulses. Such data is then fed to a first-level trigger processor which screens irrelevant information. Only data that may contain interesting information is kept for further analysis. Arrays of 50000 FERMIs constitute formidable processing systems when considering the total computational power and storage capacity.<<ETX>>","PeriodicalId":183733,"journal":{"name":"Proceedings of 1994 International Conference on Wafer Scale Integration (ICWSI)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126777859","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3