2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)最新文献

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Enclosing the modeling error in analog behavioral models using neural networks and affine arithmetic 利用神经网络和仿射算法对模拟行为模型中的建模误差进行封闭
A. Krause, M. Olbrich, E. Barke
{"title":"Enclosing the modeling error in analog behavioral models using neural networks and affine arithmetic","authors":"A. Krause, M. Olbrich, E. Barke","doi":"10.1109/SMACD.2012.6339403","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339403","url":null,"abstract":"One all-time challenge in behavioral modeling is to minimize the modeling error while still profiting from a simplified representation of an analog circuit. In many cases the modeling error is known, but up to now it was only an indicator for the quality of the model. Its influence on errors during simulation could not be evaluated. We present a flow for the generation of behavioral models based on neural networks which uses affine arithmetic to guarantee enclosing the modeling error. We also demonstrate that the approach can also be applied to modeling the effects of parameter deviations.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130840678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Analyzing nonlinear circuits using a modified harmonic balance method 用改进的谐波平衡法分析非线性电路
F. N. Zghoul, D. Egolf
{"title":"Analyzing nonlinear circuits using a modified harmonic balance method","authors":"F. N. Zghoul, D. Egolf","doi":"10.1109/SMACD.2012.6339455","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339455","url":null,"abstract":"In recent years, the necessity for fast, accurate and less memory-intensive techniques to analyze nonlinear circuits has grown as technology has advanced. The harmonic balance (HB) method is a powerful tool and it has been used for some time in nonlinear circuit analysis. In order to keep up with the vast requirements of circuit design, the harmonic balance method is modified to make it fast, more accurate and require less memory. In the modified harmonic balance (MHB) method, circuits are analyzed by calculating voltages and currents of nonlinear components in the time domain and those of linear components in the frequency domain. After that, an iteration scheme is performed in which the voltage and current values have to be transformed from one domain to the other for each single iteration. A key point to reduce the analysis time and minimize the memory required is to use an efficient way to transform from one domain to another. One-dimensional Fourier transformations are used to convert from the time domain to the frequency domain and visa versa. The current and voltage values are handled using a vector matrix for each nonlinear element instead of using Jacobian matrices.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133607414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Polynomial chaos based variability analysis of multiport systems 基于多项式混沌的多端口系统变异性分析
D. Spina, F. Ferranti, T. Dhaene, L. Knockaert, Giulio Antonini
{"title":"Polynomial chaos based variability analysis of multiport systems","authors":"D. Spina, F. Ferranti, T. Dhaene, L. Knockaert, Giulio Antonini","doi":"10.1109/SMACD.2012.6339385","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339385","url":null,"abstract":"A novel technique for the variability analysis of generic multiport systems (e.g. interconnections, filters, connectors) is presented. The proposed method describes the statistical properties of a multiport system using the Polynomial Chaos expansion, starting from a set of univariate macromodels of the system transfer function. A numerical example shows the accuracy and efficiency of the proposed approach with respect to standard Monte Carlo analysis.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133766138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A case study: Automatic topology synthesis for analog circuit from an ASDeX specification 案例研究:来自ASDeX规范的模拟电路的自动拓扑合成
Mingyu Ma, M. Meissner, L. Hedrich
{"title":"A case study: Automatic topology synthesis for analog circuit from an ASDeX specification","authors":"Mingyu Ma, M. Meissner, L. Hedrich","doi":"10.1109/SMACD.2012.6339404","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339404","url":null,"abstract":"ASDeX is an XML-based specification language for analog circuits. In this contribution we extend the ASDeX format for a usage in a synthesis work-flow. The intention is to realize a full-automatic synthesis of analog circuits from a given ASDeX specification representing all needed information for synthesis. With the help of ASDeX's API a reuse and an extraction of the ASDeX specification is easily accomplished. Using this API and several template scripts the set of target code needed for the synthesis framework will be generated. We apply the approach to an OP-AMP specification and present first synthesis results.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114655687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Analysis and experimental verification of the sensitivity of PV cell model parameters 光伏电池模型参数灵敏度分析与实验验证
H. Andrei, T. Ivanovici, E. Diaconu, M. Ghita, O. Marin, P. Andrei
{"title":"Analysis and experimental verification of the sensitivity of PV cell model parameters","authors":"H. Andrei, T. Ivanovici, E. Diaconu, M. Ghita, O. Marin, P. Andrei","doi":"10.1109/SMACD.2012.6339434","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339434","url":null,"abstract":"The model parameters of photovoltaic (PV) cell depend on the environmental conditions, especially are function of the temperature and the irradiance values of the site where the panel is placed. In this paper the performances of PV cells/panels are analysed related to the different temperature and irradiance levels by using the circuit sensitivity. Therefore the model parameters of the equivalent circuits for PV cells and their typical connections are modelled by first order sensitivity relations. LabViEW and MatLab software procedures are implemented in order to prove the theoretical models, and to provide numerical examples taken from real case on PV cells.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124128566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
An improved design of VCCS-based active inductors 基于vccs有源电感器的改进设计
M. Fakhfakh, M. Pierzchala, B. Rodanski
{"title":"An improved design of VCCS-based active inductors","authors":"M. Fakhfakh, M. Pierzchala, B. Rodanski","doi":"10.1109/SMACD.2012.6339427","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339427","url":null,"abstract":"In this paper we present an enhanced design of active inductors. The idea mainly consists of improving classical voltage controlled current source-based simulated inductors' performances by adding current controlled current sources. The proposed simulated inductor is designed using a CMOS current feedback transconductance amplifier (CFTA) which is a combination of a current follower (CF) and a transconductance amplifier (OTA). We show that the proposed inductor has better performances than the classical OTA-based ones. SPICE simulation results are given to show viability.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"235 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123197049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Automated analog filter pair design on the basis of a gyrator-capacitor prototype circuit realised in SI technique 基于旋转电容原型电路的自动模拟滤波对设计
M. Melosik, M. Naumowicz, P. Katarzynski, S. Szczȩsny, A. Handkiewicz
{"title":"Automated analog filter pair design on the basis of a gyrator-capacitor prototype circuit realised in SI technique","authors":"M. Melosik, M. Naumowicz, P. Katarzynski, S. Szczȩsny, A. Handkiewicz","doi":"10.1109/SMACD.2012.6339410","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339410","url":null,"abstract":"The paper presents an algorithmic approach to low sensitive design strategy for switched-current(SI) filter pairs based on a gyrator-capacitor prototype circuit. There is EDA software suite presented its cooperation with associated commercial tools. The functionalities of EDA system are illustrated by the design of filter pair of 5th order that was further realised in TSMC 0.18μm CMOS MS/RF technology. The filter operates at 1.8 V power supply voltage and consumes 2.5 mW. Post layout simulation results are presented and compared with ideal characteristics.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123475076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Modeling in Verilog-AMS of a front-end for the design of a multichannel readout ASIC for Si microstrips 基于Verilog-AMS的多通道读出硅微带专用集成电路前端建模
A. Montiel, R. Casanova, Á. Diéguez
{"title":"Modeling in Verilog-AMS of a front-end for the design of a multichannel readout ASIC for Si microstrips","authors":"A. Montiel, R. Casanova, Á. Diéguez","doi":"10.1109/SMACD.2012.6339442","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339442","url":null,"abstract":"Verilog-AMS is used to model the analog front-end of one channel in a multichannel readout ASIC for Silicon microstrips. The modelization in a behavioral language allowed to extract the requirements of the main components of the channel without needing to make the design at transistor level, thus decreasing the design time. This model of a complete channel will be used for further integration with the digital processing electronics of the multichannel ASIC.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131950360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
EKV-based method for biasing CMOS analog cells using mUltiple-Inputs Floating Gate MOSFETs 基于ekv的多输入浮栅mosfet偏置CMOS模拟单元的方法
A. Medina-Vázquez, M. Meda-Campaña, M. A. Gurrola-Navarro, E. Becerra-Alvarez
{"title":"EKV-based method for biasing CMOS analog cells using mUltiple-Inputs Floating Gate MOSFETs","authors":"A. Medina-Vázquez, M. Meda-Campaña, M. A. Gurrola-Navarro, E. Becerra-Alvarez","doi":"10.1109/SMACD.2012.6339424","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339424","url":null,"abstract":"A MATLAB method is introduced for biasing CMOS analog cells operating in weak inversion region and based on the Multiple-Input Floating Gate MOS Transistor. Despite SPICE language is a widely accepted tool to design CMOS analog cells, it has some problems to simulate circuits based on the Multiple-Input Floating Gate Transistor since floating nodes appear giving rise to problems of convergence and initialization. The strategy introduced here is implemented entirely in the MATLAB environment and based on the EKV transistor model. By way of example, the method is discussed using an operational amplifier. Furthermore, this technique facilitates both the bias and analysis because the MATLAB code can be easily modified to improve the model and reduce the error between simulation and measurement results. This technique may be useful for students interested in designing weak inversion analog cells using the floating gate transisor but can also be helpful for professional designers.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129971286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High level simulations of real-time built-in self-test of Σ-Δ A/D converters Σ-Δ A/D转换器实时内置自检的高级仿真
D. Strle, J. Trontelj
{"title":"High level simulations of real-time built-in self-test of Σ-Δ A/D converters","authors":"D. Strle, J. Trontelj","doi":"10.1109/SMACD.2012.6339395","DOIUrl":"https://doi.org/10.1109/SMACD.2012.6339395","url":null,"abstract":"In this paper we discuss a possibility to simplify modeling and simulation of testing strategy of high-resolution ΣΔ modulators. The methodology could be used for production as well as for real time built-in self-tests. We show that a pseudo-random signal is a good option for a signal source and that test method leads to efficient and cost-effective testing that can also be used for real time built-in self-tests. The method is theoretically analyzed and verified using Matlab simulations. The models of DUT (device under test) and reference digital circuits are simulated and the difference is demonstrated with simple area-efficient algorithm/hardware.","PeriodicalId":181205,"journal":{"name":"2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)","volume":"2016 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128066055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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