Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium最新文献_第7页

Manufacturing concerns of the electronic industry regarding intermetallic compound formation during the soldering stage 电子工业在焊接阶段关于金属间化合物形成的制造问题

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559744

H. D. Blair, T. Pan, J. Nicholson, R. Cooper, Sung-Won Oh, A. Farah

引用次数: 19

Performance models of systems of multiple cluster tools 多集群工具系统的性能模型

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559682

M. J. López, S. Wood

{"title":"Performance models of systems of multiple cluster tools","authors":"M. J. López, S. Wood","doi":"10.1109/IEMT.1996.559682","DOIUrl":"https://doi.org/10.1109/IEMT.1996.559682","url":null,"abstract":"Over the last 15 years, many semiconductor processes have migrated to single-wafer vacuum cluster tools. Although performance models of these tools are found in the literature, they are usually restricted to the analysis of single tools, even if, inevitably, several such tools may be configured into systems, and operated as such. The objective of this work is to determine, using an equation-based model, the optimal configuration and operation of systems of cluster tools in the presence of scheduled maintenance. The two extremes in the spectrum of possible cluster configurations are the serial configuration, in which the modules in a cluster tool are all different (each representing a step in process sequence), and the more popular parallel configuration, in which the modules in a tool are identical. This paper predicts that systems of parallel-configured tools can offer higher throughputs than their serial-configured counterparts. However, this advantage may be slight when equipment downtime is relatively schedulable and infrequent, in which case the serial configuration may be preferable because of its superior cycle times. We also derive the optimal lot size and lot release policy for systems of cluster tools. We conclude that cluster tools will gradually migrate from parallel configurations to serial as cluster tools become more reliable and/or cycle time becomes more important.","PeriodicalId":177653,"journal":{"name":"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium","volume":"43 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132760062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

DFM for the next generation [semiconductor manufacturing] 下一代DFM[半导体制造]

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559697

K. P. White, W. Trybula

引用次数: 3

Overall equipment effectiveness (OEE) and cost measurement [semiconductor manufacturing] 整体设备效率(OEE)和成本测量[半导体制造]

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559707

J. Konopka, W. Trybula

引用次数: 23

Effects of dispatching and down time on the performance of wafer fabs operating under theory of constraints 调度和停机时间对约束理论下晶圆厂性能的影响

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559681

D. Kayton, T. Teyner, C. Schwartz, R. Uzsoy

引用次数: 15

Hostaflon TFM "second generation" fluoropolymer for improved contamination control Hostaflon TFM“第二代”含氟聚合物，改善污染控制

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559734

M. Schlipf, G. Lohr, K. Hintzer, J. Abate, R. Spell

引用次数: 0

Flip-chip BGA assembly process and reliability improvements 倒装BGA组装工艺及可靠性改进

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559690

P. Thompson, C. Koehler, M. Petras, C. Solis

{"title":"Flip-chip BGA assembly process and reliability improvements","authors":"P. Thompson, C. Koehler, M. Petras, C. Solis","doi":"10.1109/IEMT.1996.559690","DOIUrl":"https://doi.org/10.1109/IEMT.1996.559690","url":null,"abstract":"Chip scale packages (CSP) are entering large-scale production in applications such as portable computers and consumer products. In such applications, size and weight reduction is a key goal. However, because the bulk of present and near-term CSP applications are cost-sensitive, these size and weight reductions can not come at a premium cost. The CSP producer is faced with a multi-faceted challenge. State-of-the-art process, equipment and materials are required to build these packages, but little to no price increase is acceptable. By their nature, CSPs contain minimal material to provide mechanical and environmental protection to the semiconductor die, yet no reliability performance relief is granted to CSPs. In this paper, the efforts to meet the CSP metrics of low size and weight, low cost, and high reliability for a flip-chip BGA package (the SLICC, or Slightly Larger than IC Carrier) are presented. For this package, the key challenge was to improve reliability from the then-present unacceptable level to meet Motorola package reliability requirements, without causing an unacceptable penalty in cost or manufacturability. The package construction and assembly are reviewed. Project success metrics are presented. The rational, planning, execution and analysis of a series of designed experiment performed to improve manufacturability and/or reliability are explained. The success of efforts in meeting cost and manufacturability metrics while exceeding reliability metrics is described.","PeriodicalId":177653,"journal":{"name":"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123645513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Tooling for wafer and photomask cleaning and surface preparation using a dry, laser-assisted technology 使用干燥的激光辅助技术进行晶圆和光掩膜清洁和表面制备的工具

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559735

A. Engelsberg, T. Lizotte, O. Ohar, T. R. O'Keefe

{"title":"Tooling for wafer and photomask cleaning and surface preparation using a dry, laser-assisted technology","authors":"A. Engelsberg, T. Lizotte, O. Ohar, T. R. O'Keefe","doi":"10.1109/IEMT.1996.559735","DOIUrl":"https://doi.org/10.1109/IEMT.1996.559735","url":null,"abstract":"The semiconductor industry is entering into an era of global competitiveness that needs to factor in the economics of capital and operational costs along with environmental compliance to operate profitable fabricators. Innovative manufacturing technologies will be required to meet the technological and cost requirements. This paper introduces a new technology for cleaning and surface preparation called the Radiance Process. It operates under quantum mechanical principles using only photons of light and a laminar flowing inert gas, which makes it environmentally friendly. The technology has been demonstrated to remove the following types of contamination in a one-step process that does not damage the underlying surface: Particles (organic, inorganic and metallic), metallic ions, oxides, and thin films (organic and inorganic). With its inherent simplicity, flexibility, and modular tool design, the technology can accommodate stand-alone and cluster modules as well as multiple substrate dimensions. Projected cost-of-ownership figures indicate that this technology is significantly less expensive than current wet-chemical-based processes because infrastructure for water and chemical usage and disposal is not required. This paper describes our technology, its developmental results, tool design and projected cost-of-ownership figures.","PeriodicalId":177653,"journal":{"name":"Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124274719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Application of machine learning to manufacturing: results from metal etch 机器学习在制造业中的应用:金属蚀刻的结果

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559762

A. Chatterjee, D. Croley, V. Ramamurti, Kui-Yu Chang

引用次数: 5

Cost and environmental metrics for a high density laminate technology 高密度层压板技术的成本和环境指标

Nineteenth IEEE/CPMT International Electronics Manufacturing Technology Symposium Pub Date : 1996-10-14 DOI: 10.1109/IEMT.1996.559738

C. Murphy, P. Sandborn

引用次数: 1