Flip-chip BGA assembly process and reliability improvements

Abstract

Chip scale packages (CSP) are entering large-scale production in applications such as portable computers and consumer products. In such applications, size and weight reduction is a key goal. However, because the bulk of present and near-term CSP applications are cost-sensitive, these size and weight reductions can not come at a premium cost. The CSP producer is faced with a multi-faceted challenge. State-of-the-art process, equipment and materials are required to build these packages, but little to no price increase is acceptable. By their nature, CSPs contain minimal material to provide mechanical and environmental protection to the semiconductor die, yet no reliability performance relief is granted to CSPs. In this paper, the efforts to meet the CSP metrics of low size and weight, low cost, and high reliability for a flip-chip BGA package (the SLICC, or Slightly Larger than IC Carrier) are presented. For this package, the key challenge was to improve reliability from the then-present unacceptable level to meet Motorola package reliability requirements, without causing an unacceptable penalty in cost or manufacturability. The package construction and assembly are reviewed. Project success metrics are presented. The rational, planning, execution and analysis of a series of designed experiment performed to improve manufacturability and/or reliability are explained. The success of efforts in meeting cost and manufacturability metrics while exceeding reliability metrics is described.