2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)最新文献
W. Belkhir, N. Ratier, D. Nguyen, N. Trinh, M. Lenczner, F. Zamkotsian
{"title":"A tool for aided multi-scale model derivation and its application to the simulation of a micro mirror array","authors":"W. Belkhir, N. Ratier, D. Nguyen, N. Trinh, M. Lenczner, F. Zamkotsian","doi":"10.1109/EUROSIME.2017.7926269","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926269","url":null,"abstract":"Modeling the electric field in a matrix of micro-mirrors is presented as the first application of the MEMSALab software package. The latter is dedicated to semi-automated derivation of multiscale models by asymptotic methods and will complement simulation software as finite element software. It is designed according to a principle of reusability which is called the extension-combination method developed with techniques derived from the theory of rewriting.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115837924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Maofen Zhang, Daoguo Yang, L. Ernst, Bingbing Zhang
{"title":"Simulation of delamination initiation and subsequent propagation using cohesive zones","authors":"Maofen Zhang, Daoguo Yang, L. Ernst, Bingbing Zhang","doi":"10.1109/EUROSIME.2017.7926297","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926297","url":null,"abstract":"Delamination is one of the main problems in electronic packaging due to the relatively weak adhesion strength of interfaces. Delamination failure includes two processes: crack initiation and crack propagation. Various experimental setups and theories have been built to study these processes. Among these studies the cohesive zone method being implemented in various finite element packages is becoming a popular tool for crack propagation modelling. In our previous work [1–4] the efficient use of cohesive zone modelling of the delamination propagation process of pre-cracked samples was discussed. Here also an appropriate method to establish the cohesive zone parameters was given. Among this a fitting method to establish the critical energy release rate through cohesive zone modelling was presented. Although the modelling of delamination propagation for packages with assumed pre-cracks at various spots now is quite feasible, in the thermal-mechanical designing of packages the initiation of delamination (without assumed pre-cracks) is much more important. Therefore, the present work primarily focuses on applying the cohesive zone method for the modelling of the initiation of delamination, followed by the subsequent delamination propagation. The paper will primarily investigate the crack initiation (without pre-crack) for a chosen interface. The influences of mesh size, number of loading increments and the critical stress values are investigated and discussed in detail. The computing time is considered and compared for various settings, such as to overcome convergence problems. The present study will help to make proper choices for future correct and economically feasible simulations of delamination initiation and subsequent propagation.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"177 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130711210","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Zubert, T. Raszkowski, A. Samson, M. Janicki, A. Napieralski
{"title":"The scope of applicability of DPL model to the heat transfer in electron devices","authors":"M. Zubert, T. Raszkowski, A. Samson, M. Janicki, A. Napieralski","doi":"10.1109/EUROSIME.2017.7926288","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926288","url":null,"abstract":"This paper presents the scope of applicability of Dual-Phase-Lag model in modern electronic structures. Moreover, the investigation of obligatory application of this model, instead of the classical approach based on Fourier-Kirchhoff model, to heat transfer modeling is included. Furthermore, the modified Fourier-Kirchhoff thermal model, containing the special time lag parameter, is also taken into consideration. In order to obtain the mentioned scope of applicability both analyzed thermal model, the three different classical power transistors i.e. unipolar, bipolar and insulated gate bipolar transistors (IGBT), have been considered. The received simulation results have been carefully compared and analyzed in detail.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133857417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Stiebing, D. Vogel, W. Steller, M. Wolf, U. Zschenderlein, B. Wunderle
{"title":"Correlation between mechanical material properties and stress in 3D-integrated silicon microstructures","authors":"M. Stiebing, D. Vogel, W. Steller, M. Wolf, U. Zschenderlein, B. Wunderle","doi":"10.1109/EUROSIME.2017.7926250","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926250","url":null,"abstract":"Three-dimensional (3D) electronic systems enable higher integration densities compared to their 2D counterparts, a gain required to meet the demands of future exa-scale computing, cloud computing, big data systems, cognitive computing, mobile devices and other emerging technologies. Through-silicon vias (TSVs) open a pathway to integrate electrical connections for signaling and power delivery through the silicon (Si) carrier used in 3D-stacked microstructures. As a limitation, TSVs induce locally thermomechanical stress in the Si lattice due to a mismatch in the coefficients of thermal expansion between Si and the TSV-filling metals and therefore enforce temperature related expansion and shrinkage during the annealing cycle. This temperature-induced crowding and relaxation of the Si lattice in proximity of the TSV (called “keep-out-zone” forbidden for active device positioning) can cause a variety of issues ranging from stress-induced device performance degradation, interfacial delamination or interconnect failures due to cracking of the bond or even of the entire Si microstructures at stress hotspots upon assembly or operation. Additionally also the interconnect structures induce stress that will overlap with the TSV induced stress.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125118552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Effect of excitation conditions on the durability of high standoff electronic components and assemblies under multiaxial vibration excitation","authors":"Raman Sridharan, A. Dasgupta","doi":"10.1109/EUROSIME.2017.7926295","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926295","url":null,"abstract":"Electronic assemblies often experience multiaxial vibration environments in use and tall, heavy components are more vulnerable under such loading than are short, light components. The added vulnerability comes from higher response due to nonlinear dynamic amplification of the response under simultaneous multiaxial excitation, termed multi degree of freedom (MDoF) excitation. This paper investigates the geometric nonlinearities and the resulting cross-axis interactions that tall and heavy electronic components experience when subjected to vibration excitation simultaneously along two orthogonal axes. Multiaxial vibration experiments were conducted on tip-loaded cantilever beams to explore the nonlinear vibration response of tall, heavy electronic components. Harmonic base-excitation was simultaneously applied in two orthogonal axes (with a different frequency in each axis), and the phase “difference” between these two harmonic signals was parametrically varied to see the effect on the response amplitude. Based on prior studies, the frequency of the transverse excitation was selected to be the fundamental natural frequency of the cantilever beam and that of the axial direction was selected to be twice as large to maximize the cross-axis interaction. Phase is seen to have a very significant effect on the nonlinear amplification of the response. Nonlinear finite element simulations were conducted to verify and explain the experimental observations.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124288669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Highly parallel computations of creep deformation in flip-chip interconnections","authors":"C. Bouchard, J. Sylvestre","doi":"10.1109/EUROSIME.2017.7926259","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926259","url":null,"abstract":"In order to enable the computation of creep deformation in a large number of interconnections in simulations of thermal cycling or assembly processes of flip chip devices, a submodeling approach was developed to distribute the stress and creep evaluation to independent solvers for individual (or small number of) interconnections and thus allow a high level of parallelization of the solving effort. The approach uses a first, coarser model of the complete assembly to compute the general system response to thermal and mechanical loads. Displacements calculated in this first model are fed into a large number of much more detailed models of the individual interconnections, in order to obtain local creep strains. The coarser model is iteratively updated using local creep values from the interconnection models to determine the complete time evolution of the system in the presence of interconnection creep deformation. The validity of the complete parallelized procedure is verified on simplified cases.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121096454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Zheng, H. Ye, Guoqi Zhang, Yingying Zhang, Lian Liu, Junke Jiang, Qun Yang, Chun-Jian Tan, Xianping Chen
{"title":"First principle design of CdS/germanene heterostructures with tunable electronic and transport properties","authors":"K. Zheng, H. Ye, Guoqi Zhang, Yingying Zhang, Lian Liu, Junke Jiang, Qun Yang, Chun-Jian Tan, Xianping Chen","doi":"10.1109/EUROSIME.2017.7926284","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926284","url":null,"abstract":"Two dimensional (2D) materials have received a great deal of attention and becoming increasingly essential in exploitation and application for future electronic, optical and energy devices.In this paper, we systematically researched electronic and transport properties of the interface between the CdS monolayer and germanene monolayer, by means of first-principles calculations based on the DFT. CdS/germanene heterostructures exibit desirable electronic, optical and transport properties. More specifically, we find that the band structures, light absorption, conductivity of CdS/germanene can be widely tuned by applying mechanical deformation. These remarkable characteristics are highly desirable to apply on solar cell, photodiode, phototriode, strain sensor, field effect transistor et al. ectronic and optoelectronic devices.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"149 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129158989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Nguyen, N. Trinh, M. Lenczner, F. Zamkotsian, S. Cogan
{"title":"A model of the electric field in a one-dimensional Micro-Mirror Array and electromechanical simulations and optimization in a single cell","authors":"D. Nguyen, N. Trinh, M. Lenczner, F. Zamkotsian, S. Cogan","doi":"10.1109/EUROSIME.2017.7926268","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926268","url":null,"abstract":"This paper reports recent progress in modeling and simulation of a one-dimensional Micro-Mirror Array actuated by an electrostatic force. We present results obtained through numerical simulations of a single cell: the analysis and the optimization of the pull-in voltage and the analysis of the bounces of the mirror in contact with the base when it is subjected to a voltage exceeding the pull-in voltage. For the array, a model has been derived for the electrostatic field using a multi-scale modeling technique. The model is detailed together with simulation results.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133517160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Dudek, M. Hildebrand, S. Rzepka, J. Beintner, R. Döring, L. Scheiter, B. Seiler, T. Fries, R. Ortmann
{"title":"Board level reliability assessment of consumer components for automotive use by simulation and sophisticated optical deformation analyses","authors":"R. Dudek, M. Hildebrand, S. Rzepka, J. Beintner, R. Döring, L. Scheiter, B. Seiler, T. Fries, R. Ortmann","doi":"10.1109/EUROSIME.2017.7926277","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926277","url":null,"abstract":"The development of automotive electronics (AE) towards autonomous driving applications generates various challenges, in particular also on the reliable functionality. In various cases dedicated automotive grade components are lacking and consumer components have to be used instead, which hardly fulfil automotive standards. Some of the reliability challenges are therefore thermo-mechanical in nature. Some example issues, which are related to consumer electronics (CE) packaging, in particular MEMS-packaging, are given in the paper. Main focus is laid on the development of FE-simulation based evaluation methodologies accompanied by experimental characterization methods, in particular with regard to solder fatigue. It is shown that secondary effects such as, for example, intrinsic warpage of the component and of the circuit board, that are system related effects, can play an important role in AE application. A newly developed optical multi-sensor metrology method is presented for the thermo-mechanical deformation measurement of electronic components and systems for different size and resolution ranges. Thermally induced intrinsic warpage of circuit boards and components were analyzed both by means of the method. It was found that significant intrinsic deformations and warpages can occur and should be considered directly in AE system design and indirectly when evaluation stress risks, e.g. for solder fatigue.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129682798","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Alternative Cu pillar bumps design to reduce thermomechanical stress induced during flip chip assembly","authors":"M. Lofrano, V. Cherman, Mario Gonzalez, E. Beyne","doi":"10.1109/EUROSIME.2017.7926236","DOIUrl":"https://doi.org/10.1109/EUROSIME.2017.7926236","url":null,"abstract":"In this work a Cu pillar design that combines a stiff metal pedestal with a soft polymer as buffer layer has been integrated in a dedicated test vehicle to investigate the thermo mechanical stress induced during flip chip assembly. In-situ electrical measurements of dedicated stress sensors during a Bump Assisted BEOL Stability Indentation (BABSI) test were performed to assess the strength of the bump designs. Furthermore, the package induced stress was monitored in different regions of the test chips by measuring and comparing the ION current of the stress sensors before and after packaging. By combining in-situ electrical measurements and finite element modeling it was possible to quantify the stress level induced in the Si die after packaging. The results show that the use of a stiff pedestal is very efficient to mitigate packaging induced stress.","PeriodicalId":174615,"journal":{"name":"2017 18th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134619544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}