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2016 IEEE International Reliability Physics Symposium (IRPS)最新文献

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Optimum filler geometry for suppression of moisture diffusion in molding compounds 用于抑制成型化合物中水分扩散的最佳填料几何形状
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574625
W. Ahn, S. Shin, R. Asadpour, D. Varghese, L. Nguyen, S. Krishnan, M. Alam
{"title":"Optimum filler geometry for suppression of moisture diffusion in molding compounds","authors":"W. Ahn, S. Shin, R. Asadpour, D. Varghese, L. Nguyen, S. Krishnan, M. Alam","doi":"10.1109/IRPS.2016.7574625","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574625","url":null,"abstract":"Inorganic fillers, such as fused silica or organic clay, help tailor/co-optimize the mechanical toughness, thermal conductivity, and moisture diffusivity of polymer mold compounds used to package microelectronic integrated circuits. Despite long history and wide-spread current use, the optimization of filler-infused composites is generally empirical and therefore time-consuming. A physics-based predictive modeling will improve application-specific design of composites that would offer optimum performance and reliability. As an illustrative example, in this paper, we develop a general theory of polymer composites that anticipates the suppression of moisture diffusion as a function of fill-fraction, size-dispersion, shape, and topology of filler nanoparticles. Our results show that the best performance is obtained by incorporation rod-shaped fillers, randomly closed packed at maximum density (~60%). Our numerical results are succinctly captured by the analytical model based on generalized Maxwell Garnett effective medium theory. The analytical model can be used for initial optimization of mold compounds before large-scale numerical modeling is invoked and characterization experiments are designed.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129880689","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Hardware based empirical model for predicting logic soft error cross-section 基于硬件的逻辑软误差截面预测经验模型
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574518
S. Jagannathan, N. Mahatme, N. Gaspard, T. D. Loveless, B. Bhuva, L. Massengill
{"title":"Hardware based empirical model for predicting logic soft error cross-section","authors":"S. Jagannathan, N. Mahatme, N. Gaspard, T. D. Loveless, B. Bhuva, L. Massengill","doi":"10.1109/IRPS.2016.7574518","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574518","url":null,"abstract":"This work presents a technique to estimate logic cross-section using measured single-event transient pulse widths from radiation experiments. The results are verified by comparing against direct measurement of logic cross-section using C-CREST circuit. Since the logic cross-section is extracted based on experimentally measured transients, it includes device/layout level effects and could be used by existing software-based methods to accurately predict logic soft error rate.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"184 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124648705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Device-level jitter as a probe of ultrafast traps in high-k MOSFETs 器件级抖动作为高k mosfet中超快陷阱的探头
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574646
D. Veksler, J. Campbell, J. Zhong, H. Zhu, C. Zhao, K. Cheung
{"title":"Device-level jitter as a probe of ultrafast traps in high-k MOSFETs","authors":"D. Veksler, J. Campbell, J. Zhong, H. Zhu, C. Zhao, K. Cheung","doi":"10.1109/IRPS.2016.7574646","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574646","url":null,"abstract":"A methodology for the evaluation of ultra-fast interfacial traps, using jitter measurements as a probe, is developed. This methodology is applied to study the effect of PBTI stress on the density of ultra-fast electron traps (with 500 ps to 5 ns characteristic capture/emission times) in a high-k/Si nMOSFET. It is shown, that in spite of an observed increase of timing jitter after PBTI stress, this increase may not be correlated with an increasing density of interface traps. Rather, it is solely caused by a VT shift which simply decreases the output signal amplitude. The results indicate that ultra-fast (presumably interface) traps may not be affected by PBTI stress.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124681019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Temperature sense effect in HCI self-heating de convolution: Application to 28nm FDSOI HCI自热解卷积中的温度感测效应:在28nm FDSOI上的应用
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574651
X. Federspiel, G. Torrente, W. Arfaoui, F. Cacho, V. Huard
{"title":"Temperature sense effect in HCI self-heating de convolution: Application to 28nm FDSOI","authors":"X. Federspiel, G. Torrente, W. Arfaoui, F. Cacho, V. Huard","doi":"10.1109/IRPS.2016.7574651","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574651","url":null,"abstract":"The introduction of new architecture such as finfet and FDSOI triggered many discussion around self-heating in confined MOS transistor devices. Not only self-heating challenges performance itself (reduced mobility) abut also circuit lifetime projection. On one hand occurrence self-heating during circuit operation might accelerate device degradation, on the other hand it also affects accelerated life tests such as HCI. We show in this paper that proposed methods to decorrelate self-heating from HCI stress might be affected by a systematic error due to a misinterpretation of apparent thermal activation energy.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130506842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A new model for dielectric breakdown mechanism of silicon nitride metal-insulator-metal structures 氮化硅金属-绝缘体-金属结构介电击穿机理新模型
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574515
K. Okada, Yutaka Ito, Shigeru Suzuki
{"title":"A new model for dielectric breakdown mechanism of silicon nitride metal-insulator-metal structures","authors":"K. Okada, Yutaka Ito, Shigeru Suzuki","doi":"10.1109/IRPS.2016.7574515","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574515","url":null,"abstract":"For the further advance of Si RF devices and also GaAs/GaN MMIC devices, highly reliable and low leakage MIM structure with thick silicon nitride (SiN) film has to be realized on the basis of deeper understandings on its degradation and breakdown mechanisms. Therefore, a comprehensive study has been performed on the TDDB mechanism of MIM structures with SiN films having various thicknesses fabricated by three different deposition conditions and, then, a new TDDB model, the constant ΔE model, has been proposed. The constant Qbd (charge to breakdown) hypothesis which is assumed in the generally accepted √E-model for SiN films is not valid. In contrast, the field shift until the breakdown (ΔE) monitored by the I-V characteristics is constant independent of the stress voltage, stress method - constant voltage or constant current stress-, temperature, SiN film thickness, and also the deposition condition. Furthermore, the analysis on the deposition condition dependence has revealed that the dielectric breakdown does not occur when ΔE reaches the threshold only at the cathode side. To induce breakdown, ΔE at the anode side or at both sides must reach the threshold. The voltage dependence of TDDB lifetime is also discussed.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129175792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
CAFM based spectroscopy of stress-induced defects in HfO2 with experimental evidence of the clustering model and metastable vacancy defect state 基于CAFM的HfO2中应力缺陷的光谱分析，实验证明了聚类模型和亚稳空位缺陷态
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574576
A. Ranjan, N. Raghavan, K. Shubhakar, R. Thamankar, J. Molina, S. O’Shea, M. Bosman, K. Pey
{"title":"CAFM based spectroscopy of stress-induced defects in HfO2 with experimental evidence of the clustering model and metastable vacancy defect state","authors":"A. Ranjan, N. Raghavan, K. Shubhakar, R. Thamankar, J. Molina, S. O’Shea, M. Bosman, K. Pey","doi":"10.1109/IRPS.2016.7574576","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574576","url":null,"abstract":"In this study, we perform random telegraph noise (RTN) spectroscopy on ultra-thin HfÜ2 dielectric films using a conductive atomic force microscope (CAFM), enabling accurate assessment of single or cluster defect kinetics in very small area regions with an ultra-sharp tip having radius of 15±5 nm. Our characterization results show that bias-dependent RTN trends can be clearly detected at high spatial resolution using CAFM technique. Experimental evidence of the metastable nature of oxygen vacancy defects is presented and the nanoscale breakdown results provide further support to the time-dependent defect clustering model that is recently proposed for oxide breakdown [1,2]. Statistical plots of the CAFM breakdown voltage show a trimodal distribution that corresponds to evolution of percolation cores at the grain (G), grain boundary/triple point (GB/TP) sites and G-GB interface regions.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123847264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Evaluation of inter and intra level TDDB of Cu/Low-k interconnect for high voltage application 用于高压应用的Cu/Low-k互连的电平间和电平内TDDB的评估
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574599
M. Lin, Chihching Yang, Hung-Yu Chen, A. Juan, K. Su, Y. King
{"title":"Evaluation of inter and intra level TDDB of Cu/Low-k interconnect for high voltage application","authors":"M. Lin, Chihching Yang, Hung-Yu Chen, A. Juan, K. Su, Y. King","doi":"10.1109/IRPS.2016.7574599","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574599","url":null,"abstract":"Conduction currents and TDDB results of intra and inter level low-k dielectric structures are studied and compared for high voltage application. Electrical field distributions are different for the different structures and impact the TDDB results. Failure analysis shows that Cu ion diffusion and cap interfaces are dominant impact factors for the low-k dielectric breakdown. A layout design principle of inter level low-k structure optimization to improve dielectric reliability under high voltage operation is suggested.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123944103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Unique ESD behavior and failure modes of AlGaN/GaN HEMTs AlGaN/GaN hemt独特的ESD行为和失效模式
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574608
B. Shankar, M. Shrivastava
{"title":"Unique ESD behavior and failure modes of AlGaN/GaN HEMTs","authors":"B. Shankar, M. Shrivastava","doi":"10.1109/IRPS.2016.7574608","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574608","url":null,"abstract":"Present experimental study reports various failure modes under ESD stress conditions and distinct ESD behavior of AlGaN/GaN HEMTs for the first time. Effect of MESA isolation and gate finger on the ESD behavior of HEMTs is analyzed. Effect of pulse width on ESD robustness and snapback voltage is observed and a unique power law like behavior is found. Cumulative nature of device degradation under ESD stress condition is discovered. Correlation between depth of snapback and failure threshold with % device degradation is found. Finally, impact of inverse piezoelectric effect in AlGaN/GaN system, fringing electric field, role of contact resistivity, temperature and field induced contact metal migration and premature breakdown of parasitic MESA Schottky junction are studied in context to AlGaN/GaN HEMT failure ESD conditions.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124209554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Transistor reliability characterization and comparisons for a 14 nm tri-gate technology optimized for System-on-Chip and foundry platforms 针对片上系统和代工平台优化的14nm三栅极技术的晶体管可靠性表征和比较
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574536
C. Prasad, K. Park, M. Chahal, I. Meric, S. Novak, S. Ramey, P. Bai, H. Chang, N. Dias, W. Hafez, C. Jan, N. Nidhi, R. Olac-vaw, R. Ramaswamy, C. Tsai
{"title":"Transistor reliability characterization and comparisons for a 14 nm tri-gate technology optimized for System-on-Chip and foundry platforms","authors":"C. Prasad, K. Park, M. Chahal, I. Meric, S. Novak, S. Ramey, P. Bai, H. Chang, N. Dias, W. Hafez, C. Jan, N. Nidhi, R. Olac-vaw, R. Ramaswamy, C. Tsai","doi":"10.1109/IRPS.2016.7574536","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574536","url":null,"abstract":"The transistor reliability characterization of a 14nm System-on-Chip (SoC) node optimized for low power operation is described. In-depth assessments of reliability and performance for Core and I/O devices are performed on Logic and SoC nodes, and clear trends with scaling are identified. Insight is provided into hot carrier and off-state aging, and self-heat effects. Technological advancements across process nodes demonstrate the ability to achieve matched or improved reliability in conjunction with robust generational performance gains. The 14nm SoC node is shown to be robust for all transistor reliability modes. Process monitor data are used to demonstrate the stability of the production line in high-volume manufacturing.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"179 40","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114004741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Optimization of PESD implant design for ESD robustness of 5V drain-back N-LDMOSFET 5V漏极反流N-LDMOSFET的ESD稳健性优化设计
2016 IEEE International Reliability Physics Symposium (IRPS) Pub Date : 2016-04-17 DOI: 10.1109/IRPS.2016.7574604
C. Chiang, P. Chang, Pei-Shan Tseng, Po-Ya Lai, Tien-Hao Tang, K. Su
{"title":"Optimization of PESD implant design for ESD robustness of 5V drain-back N-LDMOSFET","authors":"C. Chiang, P. Chang, Pei-Shan Tseng, Po-Ya Lai, Tien-Hao Tang, K. Su","doi":"10.1109/IRPS.2016.7574604","DOIUrl":"https://doi.org/10.1109/IRPS.2016.7574604","url":null,"abstract":"An N-LDMOS ESD protection device with drain back and PESD optimization design is proposed. With PESD layer enclosing the N+ drain region, a parasitic SCR is created to achieve high ESD level. When PESD is close to gate, the turn-on efficiency can be further improved (Vt1: 11.2 V reduced to 7.2 V) by the punch-through path from N+/PESD to PW. The proposed ESD N-LDMOS can sustain over 8KV HBM with low trigger behavior without extra area cost.","PeriodicalId":172129,"journal":{"name":"2016 IEEE International Reliability Physics Symposium (IRPS)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132377062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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