ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)最新文献_第9页

A 4 to 40V Wide Input Range and Energy Re-Cycling High Power LiDAR Driver for 5% Efficiency Enhancement and 300m Long-distance Object Detection 4 ~ 40V宽输入范围和能量循环高功率激光雷达驱动器，可实现5%效率提升和300米远距离目标检测

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911418

Si-Yi Li, Zheng-Lun Huang, Sheng Cheng Lee, Ke-Horng Chen, Kuo-Lin Zheng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai

引用次数: 1

A 1.8-67GHz Divide-by-4 ILFD Using Area-Efficient Transformer-Based Injection-Enhancing Technique 基于面积高效变压器注入增强技术的1.8-67GHz / 4 ILFD

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911503

Yudai Yamazaki, Jian Pang, A. Shirane, K. Okada

引用次数: 1

A Full Current-Mode Timing Circuit with Dark Noise Suppression for the CERN CMS Experiment 用于CERN CMS实验的全电流模式暗噪声抑制时序电路

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911529

E. Albuquerque, R. Bugalho, L. Oliveira, T. Niknejad, José C. Silva, A. Boletti, J. Varela

引用次数: 0

A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control 用于自旋量子比特控制的14nm低温SRAM任意波形发生器

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911459

M. Prathapan, P. Mueller, C. Menolfi, M. Brändli, M. Kossel, P. Francese, David Heim, Maria Vittoria Oropallo, A. Ruffino, C. Zota, T. Morf

{"title":"A cryogenic SRAM based arbitrary waveform generator in 14 nm for spin qubit control","authors":"M. Prathapan, P. Mueller, C. Menolfi, M. Brändli, M. Kossel, P. Francese, David Heim, Maria Vittoria Oropallo, A. Ruffino, C. Zota, T. Morf","doi":"10.1109/ESSCIRC55480.2022.9911459","DOIUrl":"https://doi.org/10.1109/ESSCIRC55480.2022.9911459","url":null,"abstract":"Realization of qubit gate sequences require coherent microwave control pulses with programmable amplitude, duration, spacing and phase. We propose an SRAM based arbitrary waveform generator for cryogenic control of spin qubits. We demonstrate in this work, the cryogenic operation of a fully programmable radio frequency arbitrary waveform generator in 14 nm FinFET technology. The waveform sequence from a control processor can be stored in an SRAM memory array, which can be programmed in real time. The waveform pattern is converted to microwave pulses by a source-series-terminated digital to analog converter. The chip is operational at 4 K, capable of generating an arbitrary envelope shape at the desired carrier frequency. Total power consumption of the AWG is 40-140mW at 4 K, depending upon the baud rate. A wide signal band of 1–17 GHz is measured at 4 K, while multiple qubit control can be achieved using frequency division multiplexing at an average spurious free dynamic range of 40 dB. This work paves the way to optimal qubit control and closed loop feedback control, which is necessary to achieve low latency error mitigation and correction in future quantum computing systems.","PeriodicalId":168466,"journal":{"name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122048930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

A Sub-0.01° Phase Resolution 6.8-mW fNIRS Readout Circuit Employing a Mixer-First Frequency-Domain Architecture 采用混频器优先频域结构的低于0.01°相位分辨率6.8 mw fNIRS读出电路

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911433

Cheng Chen, Zhouchen Ma, Yaxin Liu, Zhenhong Liu, Linfeng Zhou, Yan Wu, Liang Qi, Yongfu Li, M. Sawan, Guoxing Wang, Jian Zhao

引用次数: 1

A Bang-Bang Digital PLL Covering 11.1-14.3 GHz and 14.7-18.7 GHz with sub-40 fs RMS Jitter in 7 nm FinFET Technology 一个覆盖11.1-14.3 GHz和14.7-18.7 GHz的Bang-Bang数字锁相环，在7nm FinFET技术中RMS抖动低于40fs

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911298

Staffan Ek, Patrik Karlsson, Andreas Kämpe, R. Strandberg, A. Narayanan, Martin Anderson, Hind Dafallah, Mesrop Daghbashyan, Tayebeh Ghanavati Nejad, Robert Hägglund, N. Ivanisevic, R. Nilsson, Peter Nygren, Mattias Palm, Erik Säll, S. Tao, My-Chien Yee, Lars Sundström

引用次数: 1

An FDD Auxiliary Receiver with a Highly Linear Low Noise Amplifier 带高线性低噪声放大器的FDD辅助接收机

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911524

Jin Jin, Simone Lecchi, R. Castello, D. Manstretta

引用次数: 1

On-Chip High-Resolution Timing Characterization Circuits for Memory IPs 存储器ip的片上高分辨率时序表征电路

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911374

A. Agarwal, S. Hsu, M. Anders, G. Pandya, R. Krishnamurthy, J. Tschanz, V. De

引用次数: 0

All-Digital Time-Domain Compute-in-Memory Engine for Binary Neural Networks With 1.05 POPS/W Energy Efficiency 二进制神经网络的全数字时域内存计算引擎，能量效率为1.05 POPS/W

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911382

Jie Lou, Christian Lanius, Florian Freye, Tim Stadtmann, T. Gemmeke

引用次数: 5

SmartHeaP - A High-level Programmable, Low Power, and Mixed-Signal Hearing Aid SoC in 22nm FD-SOI SmartHeaP是一款高级可编程、低功耗、混合信号的22nm FD-SOI助听器SoC

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911325

Jens Karrenbauer, Simon C. Klein, S. Schönewald, Lukas Gerlach, Meinolf Blawat, Jens Benndorf, Holger Blume

{"title":"SmartHeaP - A High-level Programmable, Low Power, and Mixed-Signal Hearing Aid SoC in 22nm FD-SOI","authors":"Jens Karrenbauer, Simon C. Klein, S. Schönewald, Lukas Gerlach, Meinolf Blawat, Jens Benndorf, Holger Blume","doi":"10.1109/ESSCIRC55480.2022.9911325","DOIUrl":"https://doi.org/10.1109/ESSCIRC55480.2022.9911325","url":null,"abstract":"To handle the advances in hearing aid algorithms, the need for high-level programmable but low-power hardware architectures arises. Therefore, this paper presents the Smart Hearing Aid Processor (SmartHeaP), a mixed-signal system on chip (SoC) fabricated in 22 nm fully-depleted silicon-on-insulator (FD-SOI) with an adaptive body biasing (ABB) unit and a total die size of 7.36 mm 2. The proposed SoC consists of two application-specific instruction set processor (ASIP) architectures: firstly, a Cadence Tensilica Fusion G6 instruction set architecture, extended with custom instructions for audio processing, and secondly, a Cadence Tensilica LX7 for wireless interfacing, e.g., Bluetooth Low Energy. Furthermore, an analog front-end and digital audio interfaces are added. The large local memory of 2 MB and a high-level software environment enables memory-intensive algorithms to be deployed quickly. Typical hearing aid algorithms in a real-time setup are used to evaluate the power consumption of the SoC at different operating frequencies. At 50 MHz, a mean power consumption of less than 2.2 mW was measured, resulting in an efficiency of 34.8 µW/MHz.","PeriodicalId":168466,"journal":{"name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128821116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1