ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)最新文献_第8页

Statistical measurements and Monte-Carlo simulations of DCR in SPADs spad中DCR的统计测量和蒙特卡罗模拟

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911519

Mathieu Sicre, M. Agnew, C. Buj, C. Coutier, D. Golanski, R. Helleboid, B. Mamdy, I. Nicholson, S. Pellegrini, D. Rideau, D. Roy, F. Calmon

{"title":"Statistical measurements and Monte-Carlo simulations of DCR in SPADs","authors":"Mathieu Sicre, M. Agnew, C. Buj, C. Coutier, D. Golanski, R. Helleboid, B. Mamdy, I. Nicholson, S. Pellegrini, D. Rideau, D. Roy, F. Calmon","doi":"10.1109/ESSCIRC55480.2022.9911519","DOIUrl":"https://doi.org/10.1109/ESSCIRC55480.2022.9911519","url":null,"abstract":"Dark Count Rate (DCR) in 3D-stacked CMOS Single-Photon Avalanche Diode (SPAD) is investigated by means of measurements and simulations at various temperatures and voltages. This study strengthens previous hypotheses on the roles of depleted regions and interfaces in DCR generation by examining device architectures. A nonradiative multiphonon-assisted trapping model (NRM) is used to calculate the carrier capture/emission rate of defect sites. Systematic comparison between measurement and Empirical Monte-Carlo (EMC) simulation, accounting for the stochastic diffusion of carriers in computation of the avalanche breakdown probability (Pt), was performed to investigate trap and avalanche positions within the device. This simulation unveils device regions contributing to different DCR dynamics by de-embedding carrier avalanche localizations. Based on this simulation methodology, the DCR statistical distribution induced by local device-to-device process variation is covered by randomly setting the defect positions and sizes within the device.","PeriodicalId":168466,"journal":{"name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128531180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

A Review on the State-of-the-Art THz FMCW Radars Implemented on Silicon: Invited 在硅上实现的最先进的太赫兹FMCW雷达综述

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911504

M. Taba, S. Naghavi, E. Afshari

引用次数: 0

The Future of Short Reach Interconnect 短距离互联的未来

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911398

D. Tonietto

引用次数: 1

Physical Implementation of a Tunable Memristor-based Chua's Circuit 基于可调忆阻器的蔡氏电路的物理实现

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911527

M. Escudero, S. Spiga, M. D. Marco, M. Forti, G. Innocenti, A. Tesi, F. Corinto, S. Brivio

引用次数: 0

A 58 GHz Bandwidth, and less than 1.8% THD, Mach-Zehnder Driver, in 28 nm CMOS Technology 采用28纳米CMOS技术，带宽为58 GHz, THD小于1.8%，Mach-Zehnder驱动器

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911473

Nicola Cordioli, D. Manstretta, R. Castello

引用次数: 0

Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training 暗面:2.6GFLOPS, 8.7mW异构RISC-V集群，用于片上极端边缘DNN推理和训练

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911384

Angelo Garofalo, Matteo Perotti, Luca Valente, Yvan Tortorella, Alessandro Nadalini, L. Benini, D. Rossi, Francesco Conti

{"title":"Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training","authors":"Angelo Garofalo, Matteo Perotti, Luca Valente, Yvan Tortorella, Alessandro Nadalini, L. Benini, D. Rossi, Francesco Conti","doi":"10.1109/ESSCIRC55480.2022.9911384","DOIUrl":"https://doi.org/10.1109/ESSCIRC55480.2022.9911384","url":null,"abstract":"Extreme-edge applications using Deep Learning (DL) have strict requirements in terms of latency, throughput, accuracy, and flexibility. Heterogeneous clusters are promising architectural solutions that combine the programmability of DSP-enhanced cores with the performance and efficiency boost of specialized accelerators. We present Darkside, a System-on-Chip with a heterogeneous cluster of 8 RISC-V cores enhanced with 2-b to 32-b mixed-precision integer arithmetic. To further speed-up key compute-intensive Deep Neural Network (DNN) kernels, the cluster is enriched with three specialized digital accelerators: an accelerator for low-data-reuse depthwise convolution kernels (up to 30 MAC/cycle); a minimal overhead datamover to marshal 1-b to 32-b data on-the-fly; a 16-b floating point Tensor Product Engine (TPE) for tiled matrix-multiplication acceleration. Darkside is implemented in 65nm CMOS technology. The cluster achieves a peak integer performance of 65 GOPS and a peak efficiency of 835 GOPS/W when working on 2-b integer DNN kernels. When targeting floating-point tensor operations, the TPE provides up to 18.2 GFLOPS of performance or 300 GFLOPS/W of efficiency – enough to enable on-chip floating-point training at competitive speed coupled with ultra-low power quantized inference.","PeriodicalId":168466,"journal":{"name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129210608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Electroluminescence of $Si_{x}Ge_{1-x-y}Sn_{y}/Ge_{1-y}Sn_{y}$ pin-Diodes Grown on a GeSn Buffer 在GeSn缓冲器上生长的$Si_{x}Ge_{1-x-y}Sn_{y}/Ge_{1-y}Sn_{y}$引脚二极管的电致发光

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911458

L. Seidel, S. Schäfer, M. Oehme, Dan Buca, G. Capellini, J. Schulze, D. Schwarz

{"title":"Electroluminescence of $Si_{x}Ge_{1-x-y}Sn_{y}/Ge_{1-y}Sn_{y}$ pin-Diodes Grown on a GeSn Buffer","authors":"L. Seidel, S. Schäfer, M. Oehme, Dan Buca, G. Capellini, J. Schulze, D. Schwarz","doi":"10.1109/ESSCIRC55480.2022.9911458","DOIUrl":"https://doi.org/10.1109/ESSCIRC55480.2022.9911458","url":null,"abstract":"We present the growth, fabrication, and characterization of a $text{Ge}_{1-y}Sn_{mathrm{y}}$ pin-diode and a $text{Si}_{mathrm{x}}text{Ge}_{1-mathrm{x}-mathrm{y}}text{Sn}_{mathrm{y}}/ text{Ge}_{1-mathrm{y}}text{Sn}_{mathrm{y}}$ pin-diode. The pin-diodes are grown by molecular beam epitaxy on a partially relaxed $text{Ge}_{1-mathrm{y}}text{Sn}_{mathrm{y}}$ buffer grown by reduce-pressure chemical vapor deposition. The analysis of the crystal shows that the $text{Ge}_{1-mathrm{y}}text{Sn}_{mathrm{y}}$ pin-diode is lattice-matched grown and the $text{Si}_{mathrm{x}}text{Ge}_{1-mathrm{x}-mathrm{y}}text{Sn}_{mathrm{y}}/text{Ge}_{1-mathrm{y}}text{Sn}_{mathrm{y}}$ pin-diode is pseudomorphic grown with respect to the buffer. Temperature-dependent direct current measurements reveal a threshold voltage shift from 0.3 V to 0.55 V and a series resistance that shows metallic behavior. Furthermore, by comparing the electroluminescence spectra at 13.4 K and 293 K we observe a 10 times higher signal for the $text{Ge}_{1-mathrm{y}}text{Sn}_{mathrm{y}}$ pin-diode and a 3 times higher signal for the $text{Si}_{mathrm{x}}text{Ge}_{1-mathrm{x}-mathrm{y}}text{Sn}_{mathrm{y}}/text{Ge}_{1-mathrm{y}}text{Sn}_{mathrm{y}}$ pin-diode at cryogenic temperatures. The peak energies at an injection current density of 2.5 kA/cm2 are 575 meV and 610 meV, respectively.","PeriodicalId":168466,"journal":{"name":"ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)","volume":"197 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132970821","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A reconfigurable $224times 272$-pixel single-photon image sensor for photon timestamping, counting and binary imaging at $30.0-mu mathrm{m}$ pitch in 11 0nm CIS technology 一种可重构的$224 × 272$像素单光子图像传感器，用于$30.0-mu maththrm {m}$间距的光子时间戳、计数和二进制成像

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911497

L. Gasparini, Manuel Moreno-García, M. Zarghami, A. Stefanov, Bruno Eckmann, M. Perenzoni

引用次数: 1

Thermal switching of $text{TiO}_{2}$ -based RRAM for parameter extraction and neuromorphic engineering 基于$text{TiO}_{2}$的RRAM热开关参数提取与神经形态工程

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911223

Alessandro Milozzi, Daniel Reiser, A. Drost, Thomas-Oliver Neuner, M. Tornow, D. Ielmini

引用次数: 0

A 5.4-mW 50-MHz 29.3-dBm-IIP3 Fourth-Order Low-Pass Filter 5.4 mw 50 mhz 29.3 dbm - iip3四阶低通滤波器

ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) Pub Date : 2022-09-19 DOI: 10.1109/ESSCIRC55480.2022.9911301

Liangbo Lei, Cong Tao, Z. Chen, Zhiliang Hong, Yumei Huang

引用次数: 0