{"title":"Performance Evaluation of Three-Phase Grid-Connected Inverter With Improved SMC-Based MPC Control Method","authors":"Ekrem Demir, Ozan Gulbudak","doi":"10.1002/cta.70262","DOIUrl":"https://doi.org/10.1002/cta.70262","url":null,"abstract":"<div>\u0000 \u0000 <p>Grid-connected inverters are widely used in power systems that utilize renewable energy sources. The filter and control method to be used for these grid-connected inverters plays an important role. Various filter topologies are employed to reduce the harmonics of the grid current. The <i>LCL</i> filter is superior to existing filters in terms of harmonic suppression performance and overcoming unwanted resonant effects. In addition, model predictive control (MPC) techniques are widely used in the literature to regulate the grid dynamics in grid-connected inverters. Conventional MPC has the advantages of fast dynamics and easy applicability. This paper proposes new MPC methods for a 3-phase <i>LCL</i>-filtered grid-connected inverter system. The traditional MPC approach may suffer from instability in the case of a poor choice of control parameters. In the proposed method, the traditional MPC method is reformulated to shape the closed-loop energy. Lyapunov approximation is used to ensure the stability of the proposed control methods, and the control input is determined by assessing the instantaneous stability of the system. The effectiveness of the proposed control methods and the conventional MPC method is tested in the Matlab/Simulink environment by changing the grid reference current step, and it is supported by the implementation of the processor-in-the-loop (PIL). The DSP evaluation board F28379D is used to perform the experimental validation. As a result of the simulation study and PIL implementation, the proposed MPC methods provide better steady-state performance than the conventional MPC methods.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 8","pages":"4273-4288"},"PeriodicalIF":1.4,"publicationDate":"2026-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148662713","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zhangyong Chen, Lei Ren, Yunfeng Wu, Xin Tong, Zhijie Luo
{"title":"Design and Implementation of Switched-Capacitor-Buck Converter With Improved Light Load Efficiency","authors":"Zhangyong Chen, Lei Ren, Yunfeng Wu, Xin Tong, Zhijie Luo","doi":"10.1002/cta.70289","DOIUrl":"https://doi.org/10.1002/cta.70289","url":null,"abstract":"<div>\u0000 \u0000 <p>The intermediate bus power architecture applied in data centers usually adopts a two-stage <b>DC–</b>DC conversion scheme from 48 V bus voltage. In order to further improve the conversion efficiency of the two-stage circuit while reducing the size and cost of the circuit output capacitor, the overall system control with charge COT control scheme is utilized in this paper, not only can achieve higher efficiency under light load, while the output capacitor in the use of smaller, lower cost ceramic capacitors. Moreover, the existence of the subharmonic oscillation phenomenon is omitted. The experimental results show that the proposed control scheme can significantly improve the light-load efficiency of the two-stage circuit, and at the same time, the output ripple of the ceramic capacitor can be controlled to about 20 mV (0.4%) without subharmonic oscillation at an output load point voltage of 5 V.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 8","pages":"4303-4314"},"PeriodicalIF":1.4,"publicationDate":"2026-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148662896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Le Yu, Min Zhao, You Lv, Shujia Xu, Guangyi Yang, Lin Yang, Changsong Cai
{"title":"A Dual-Mode WPT Charging System Based on Double-Side Reconfiguration","authors":"Le Yu, Min Zhao, You Lv, Shujia Xu, Guangyi Yang, Lin Yang, Changsong Cai","doi":"10.1002/cta.70243","DOIUrl":"https://doi.org/10.1002/cta.70243","url":null,"abstract":"<div>\u0000 \u0000 <p>Considering that different numbers of lithium batteries require different voltage levels for charging, it is crucial to design a wireless power transfer (WPT) system to achieve different outputs. This paper proposes a dual-mode WPT charging system based on double-side reconfiguration, which can be configured as an S-S dual-coil structure to achieve constant current (CC) output and two S-S-S three-coil structures to achieve two constant voltage (CV) outputs. At the same time, the system achieves zero phase angle (ZPA) operation in both CC and two CV modes, ensuring high efficiency of the charging process. In addition, the overall resonance condition is satisfied by the system through the parameter design method of the three coils, without the need for special decoupling coil design, thus reducing the difficulty of system design. Firstly, the proposed WPT charging system is modeled in detail and comprehensively analyzed theoretically. Secondly, the simulation model is established by simulink and 3D-Maxwell to verify the CC and CV output characteristics under the ZPA condition of the system. Finally, an experimental prototype with CC output of 1.5 A and CV outputs of 53 and 66 V is built to verify the feasibility of the proposed WPT system.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 8","pages":"4147-4157"},"PeriodicalIF":1.4,"publicationDate":"2026-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148662383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automatic Calibration of Frequency Response for AC Attenuators in Precision Voltage Measurements","authors":"Hongjun Hu, Haixia Song, Qiang Luo","doi":"10.1002/cta.70290","DOIUrl":"https://doi.org/10.1002/cta.70290","url":null,"abstract":"<div>\u0000 \u0000 <p>Conventional RC divider–based attenuators in precision AC voltage measurement are highly susceptible to parasitic parameters. This issue causes fluctuating attenuation ratios at high frequencies and degrades signal transmission accuracy. To address this, a novel calibration method is proposed to stabilize frequency response through capacitive compensation and feedback adjustment. A calibration model is first established by mapping the time- and frequency-domain responses, explicitly accounting for real-life parasitic effects. Guided by this model, an automatic frequency compensation system and a corresponding timing diagram are designed. The method is validated through simulation and experiment using a 100:1 AC attenuator for covering 300 V RMS measurement. Results demonstrate markedly improved performance: The low-voltage (LV) attenuation achieves a response flatness of 0.43% in the 10 Hz to 100 kHz band and 0.59% in the 10 Hz to 1 MHz band, whereas the high-voltage (HV) attenuation shows 0.68% flatness in the 10 Hz to 100 kHz frequency band. Additionally, the design exhibits excellent linearity better than 41 ppm and minimal temperature drift.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 8","pages":"4371-4383"},"PeriodicalIF":1.4,"publicationDate":"2026-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148662901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Robust Design and Controllability Analysis for Voltage Mode Controlled Multiport Converter With Structured Uncertainties","authors":"Md. Modassir Masoom, Mayank Kumar, Narendra Kumar","doi":"10.1002/cta.70261","DOIUrl":"https://doi.org/10.1002/cta.70261","url":null,"abstract":"<div>\u0000 \u0000 <p>This paper presents a robust voltage-mode controlled (VMC) strategy and controllability analysis of a time-multiplexed dc-dc multiport (TMDCM) converter for non-minimum phase (NMP) conditions. The instability mitigation is presented using a systematically designed PI controller using the stability boundary locus (SBL) method and Kharitonov's theorem, incorporating structured uncertainties and external disturbances. A robust stability region is defined within the <i>K</i><sub><i>p</i></sub> and <i>K</i><sub><i>i</i></sub> plane, and a section with optimal gain values to meet the desired performance criteria. The proposed approach uses voltage feedback from both the output ports of the TMDCM converter. Additionally, it inherently accounts for input and load variations, enhancing voltage regulation performance. A robust single-loop voltage-mode controller with structured uncertainties is analytically designed for a time-multiplexed switched-boost converter exhibiting a right-half-plane (RHP) zero. The switched-boost mechanism, combined with time-multiplexed control, enables a multiport converter output that provides bidirectional functionality for charging and discharging management of the battery energy storage system, along with other load output ports. The laboratory prototype is developed, and the real-time performance of the converter is demonstrated for effective voltage regulation under varying source and load conditions, confirming controller robustness, non-fragility, and improved disturbance rejection.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 8","pages":"4207-4222"},"PeriodicalIF":1.4,"publicationDate":"2026-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148662631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Manoj A. Waghmare, Bhimrao S. Umre, Mohan V. Aware
{"title":"Realizing Trade-OFFs in Virtual Voltage Vector Based Model Predictive Control of 3 \u0000\u0000 ∅ to 6 \u0000\u0000 ∅ MC to Suppress the Common Mode Voltage","authors":"Manoj A. Waghmare, Bhimrao S. Umre, Mohan V. Aware","doi":"10.1002/cta.70266","DOIUrl":"https://doi.org/10.1002/cta.70266","url":null,"abstract":"<div>\u0000 \u0000 <p>The impact of common mode voltage (CMV) on induction motor life is significant under non-sinusoidal terminal voltage. In the advent of matrix converters for multi-phase drives pose a challenge not only to reduce CMV but also to maintain the load current total harmonic distortion (THD) within the acceptable limits. Hence, the matrix converter (MC) performance is attributed to CMV reduction, load current THD minimization and supply side UPF maintenance which together is difficult to attend without any trade-off. This paper presents a three-phase to six-phase matrix converter (\u0000<span></span><math>\u0000 <mn>3</mn>\u0000 <mo>∅</mo>\u0000 <mtext>to</mtext>\u0000 <mspace></mspace>\u0000 <mn>6</mn>\u0000 <mo>∅</mo></math> MC) with virtual vector-based predictive control. In the classical predictive control selective utilization of the available voltage vectors, could lead to CMV reduction at the cost of the increase in the load current THD. The proposed predictive control is derived with selective virtual voltage vector formation to reduce the CMV while maintaining the load current THD within the limits. The trade-off between CMV and THD is achieved by using a decisive weighting factor in the cost function. The performance of the \u0000<span></span><math>\u0000 <mn>3</mn>\u0000 <mo>∅</mo>\u0000 <mtext>to</mtext>\u0000 <mspace></mspace>\u0000 <mn>6</mn>\u0000 <mo>∅</mo></math> MC, such as efficiency improvement with supply side unity power factor (UPF) is also achieved. This control algorithm is executed using a low-cost dsPIC processor and verified experimentally to validate the effectiveness of the proposed algorithm.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"54 8","pages":"4223-4234"},"PeriodicalIF":1.4,"publicationDate":"2026-08-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148662686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}