International Journal of Circuit Theory and Applications最新文献

A Low-Cost Open-Loop Digital Spread Spectrum Clock Divider for Class-D Audio Amplifier in 180-nm CMOS 一种用于d类音频放大器的低成本开环数字扩频时钟分配器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2025-04-02 DOI: 10.1002/cta.4537

Yufei Wu, Zhaoquan Zeng

{"title":"A Low-Cost Open-Loop Digital Spread Spectrum Clock Divider for Class-D Audio Amplifier in 180-nm CMOS","authors":"Yufei Wu, Zhaoquan Zeng","doi":"10.1002/cta.4537","DOIUrl":"https://doi.org/10.1002/cta.4537","url":null,"abstract":"<div>\u0000 \u0000 <p>This brief report introduces a low-cost, open-loop digital spread spectrum clock divider (DSSCD) specifically designed for class-D audio amplifier applications. Unlike conventional spread spectrum clock generators that rely on feedback architectures, such as phase-locked loops (PLLs) and delay-locked loops (DLLs), the proposed DSSCD employs a feed-forward architecture using simple, fully synthesizable circuit blocks combined with an analog harmonic suppresser. The core design features a counter-based clock divider (CBCD) with dynamically adjustable division factors. This clock divider is driven by a \u0000<span></span><math>\u0000 <mi>Δ</mi>\u0000 <mi>Σ</mi></math>-modulated triangular waveform, which continuously varies the division ratio, effectively spreading the clock spectrum and reducing spectral peaks that contribute to electromagnetic interference (EMI). A digital waveform generator produces the triangular input signal for modulation, while the harmonic suppresser attenuates high-frequency harmonics to smooth the divider's output. Fabricated in 180-nm digital process and operating at a 1.2-V supply, the proposed DSSCD achieves an output frequency range from 96 kHz (12 fs, 1 fs = 8 kHz) to 1.024 MHz (128 fs), with a frequency spread range from 0% to 10%. The design occupies an area of 0.0108 mm\u0000<span></span><math>\u0000 <msup>\u0000 <mrow></mrow>\u0000 <mrow>\u0000 <mn>2</mn>\u0000 </mrow>\u0000 </msup></math> and consumes 252 \u0000<span></span><math>\u0000 <mi>μ</mi></math>W with 147.456-MHz (18,432-fs) input and 192-kHz (24-fs) output. By simplifying circuit complexity while reducing power consumption and chip area, the proposed DSSCD provides an efficient and cost-effective spread spectrum solution for class-D audio applications.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 7","pages":"4000-4007"},"PeriodicalIF":1.8,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144525017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Distributed Secondary Control for Islanded DC Microgrids With Event-Triggered Quantization Communication 基于事件触发量化通信的孤岛直流微电网分布式二次控制

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2025-03-11 DOI: 10.1002/cta.4450

Baoyan Wang, Xin Cai, Xinyuan Nan

引用次数: 0

A Novel Hexagonal Switched Capacitor Unit (HSCU) Design With Seven-Level Multilevel Inverter Topology 一种具有七电平多电平逆变器拓扑结构的新型六角形开关电容单元（HSCU）设计

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2025-02-13 DOI: 10.1002/cta.4469

Murat Karakılıç

{"title":"A Novel Hexagonal Switched Capacitor Unit (HSCU) Design With Seven-Level Multilevel Inverter Topology","authors":"Murat Karakılıç","doi":"10.1002/cta.4469","DOIUrl":"https://doi.org/10.1002/cta.4469","url":null,"abstract":"<div>\u0000 \u0000 <p>In this paper, a new switched capacitor (SC) unit is proposed, which provides a solution for the multiple DC voltage requirement of multi-level inverters (MLIs). The proposed hexagonal switched capacitor unit (HSCU) contains SCs that have self-balancing ability and do not require any additional circuits. HSCU provides three voltage boosts using only one DC voltage source with four power switches, two capacitors, and two discrete diodes. A comparison with related topologies in the literature indicates that the proposed topology requires considerably fewer power devices than others. To suppress impulsive charging currents in the capacitors, a soft charging cell (SCC) is utilized. Experimental results demonstrate that the SCC effectively suppresses current peaks, contributing to improved circuit performance. In addition, the proposed 7L SC-MLI has successfully passed the simulation and experimental realization tests with nearest level control (NLC) modulation techniques and sinusoidal pulse width modulation (SPWM) modulation techniques. Response to dynamic changes in frequency, modulation index (MI) and load have been verified through tests. Power loss analysis was performed in PLECS software, and the efficiency was found to be 96.45%.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 7","pages":"4278-4294"},"PeriodicalIF":1.8,"publicationDate":"2025-02-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144524554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Novel Modular Expandable Multilevel Converter 一种新型模块化可扩展多电平变换器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2025-02-13 DOI: 10.1002/cta.4429

Shuai Gao, Zhenyu Jiang, Fukuan Pang, Sixiang Zhao

引用次数: 0

Current-Mirror Based Filters With Reduced Circuit Complexity 降低电路复杂度的基于电流镜的滤波器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2025-01-09 DOI: 10.1002/cta.4430

Julia Nako, Costas Psychalinos, Shahram Minaei, Erkan Yuce

引用次数: 0

An Improved Model Predictive Current Control of BLDC Motor With a Novel Adaptive Extended Kalman Filter–Based Back EMF Estimator and a New Commutation Duration Approach for Electrical Vehicle 基于自适应扩展卡尔曼滤波的新型反电动势估计器和电动汽车换相持续时间方法改进无刷直流电机模型预测电流控制

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-12-23 DOI: 10.1002/cta.4407

Remzi Inan

{"title":"An Improved Model Predictive Current Control of BLDC Motor With a Novel Adaptive Extended Kalman Filter–Based Back EMF Estimator and a New Commutation Duration Approach for Electrical Vehicle","authors":"Remzi Inan","doi":"10.1002/cta.4407","DOIUrl":"https://doi.org/10.1002/cta.4407","url":null,"abstract":"<div>\u0000 \u0000 <p>As a result of the increasing use of electric vehicles, ensuring high-performance speed and torque control of brushless direct current (BLDC) motors has become of great importance for energy efficiency. In order to prevent the torque ripple of the finite control set model predictive current control (FCS-MPCC), commutation moments are detected by Hall effect sensors in conventional methods. However, this method cannot exhibit a long-life structure because of physical strain damaging the sensors and electrical connections. In this study, commutation moments and durations are captured and determined with a new approach. Commutation moments are captured with zero crossing detectors and commutation durations are determined by using the position information obtained from the encoder. Moreover, three-phase back electromotive forces (EMFs) of the BLDC motor applied to FCS-MPCC to predict the stator phase currents are estimated with a novel adaptive extended Kalman filter (AEKF) which has the estimation capability without any speed sensor. Furthermore, another improvement is implemented in the calculation of the cost function of FCS-MPCC by taking into account the difference between the predicted and the reference torque of the BLDC motor different from the conventional MPCC methods. The proposed drive system is tested under different scenarios at various speeds under load torque, stator resistance, and leakage inductance variations in simulation. It is proven by simulation results that phase commutations can be achieved stably with the proposed phase commutation determination method. In addition, the simulation results show that the proposed novel AEKF estimator and the FCS-MPCC in which the cost function is calculated by regarding not only the current error but also the moment error have impressive prediction and control performance, respectively.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 2","pages":"1135-1150"},"PeriodicalIF":1.8,"publicationDate":"2024-12-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143118586","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An Encoding ASIC With Real-Time Correction for Inductive Angular Sensing Systems 一种用于电感式角度传感系统的实时校正编码ASIC

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-11-12 DOI: 10.1002/cta.4357

Yuchen Zhao, Kai Wang, Tao Shen, Weimin Hu, Jianzheng Li, Yajie Qin

{"title":"An Encoding ASIC With Real-Time Correction for Inductive Angular Sensing Systems","authors":"Yuchen Zhao, Kai Wang, Tao Shen, Weimin Hu, Jianzheng Li, Yajie Qin","doi":"10.1002/cta.4357","DOIUrl":"https://doi.org/10.1002/cta.4357","url":null,"abstract":"<div>\u0000 \u0000 <p>This article presents an application specific integrated circuit (ASIC) for inductive angular sensing systems, integrating analog-to-digital converters (ADCs), digital signal processing (DSP) circuits, and a RISC-V core on-chip. The chip, fabricated in a 0.11-μm CMOS process, is capable of real-time error correction and angle encoding in response to nonideal factors such as offset, nonlinearity, and noise in the system's sensing signals. This integrated encoding solution could effectively address the issues of large system volume, saving hardware resources while achieving high precision angular measurement. A rotary encoder was additionally developed, utilizing a compact printed circuit board (PCB), which integrates the proposed ASIC, sensing front-end circuits, and inductive coils. When the on-chip real-time correction is enabled, the resolution of the encoder is improved from 0.3516° to 0.0054°, and the nonlinearity error in the 360° range is reduced from 0.5507° to 0.0320°. Besides, the nonlinear error has decreased by more than 90% at different rotation speeds.</p>\u0000 </div>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 7","pages":"4391-4401"},"PeriodicalIF":1.8,"publicationDate":"2024-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144524552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Monolithically Integrated Quantum Dots in a 22-nm Fully Depleted Silicon-on-Insulator Process Operating at 3 K 22纳米完全耗尽绝缘体上硅工艺中的单片集成量子点在3k下工作

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-11-10 DOI: 10.1002/cta.4350

Imran Bashir, Andrii Sokolov, Xutong Wu, Panagiotis Giounanlis, Nikolaos Petropoulos, Dirk Leipold, Mike Asker, Ali Esmailiyan, Dennis Andrade-Miceli, Hans-Christoph Haenlein, Conor McGeough, Robert Bogdan Staszewski, Elena Blokhina

{"title":"Monolithically Integrated Quantum Dots in a 22-nm Fully Depleted Silicon-on-Insulator Process Operating at 3 K","authors":"Imran Bashir, Andrii Sokolov, Xutong Wu, Panagiotis Giounanlis, Nikolaos Petropoulos, Dirk Leipold, Mike Asker, Ali Esmailiyan, Dennis Andrade-Miceli, Hans-Christoph Haenlein, Conor McGeough, Robert Bogdan Staszewski, Elena Blokhina","doi":"10.1002/cta.4350","DOIUrl":"https://doi.org/10.1002/cta.4350","url":null,"abstract":"<p>Quantum computers comprising large-scale arrays of qubits will enable complex algorithms to be executed to provide a quantum advantage for practical applications. A prerequisite for this milestone is a power-efficient qubit control and detection system operating at cryogenic temperatures. Implementing such systems in complementary metal-oxide-semiconductor (CMOS) technology offers clear advantages in terms of scalability. Here, we present a fully integrated quantum dot array in which silicon quantum wells are co-located with control and detection circuitry on the same die in a commercial 22-nm fully depleted silicon-on-insulator (FDSOI) process. Our system comprises a two-dimensional quantum dot array, integrated with 8 detectors and 32 injectors, operating at 3 K inside a cryo-cooler. The power consumption of the control and detection circuitry is 2.5 mW per qubit without body biasing. The design utilizes 0.8-V nominal \u0000<span></span><math>\u0000 <msub>\u0000 <mrow>\u0000 <mi>V</mi>\u0000 </mrow>\u0000 <mrow>\u0000 <mi>t</mi>\u0000 </mrow>\u0000 </msub></math> devices. The setup allows us to verify discrete charge injection control and detection at the quantum dot array and demonstrate the feasibility of this architecture for scaling up the existing quantum core to hundreds and thousands of physical qubits.</p>","PeriodicalId":13874,"journal":{"name":"International Journal of Circuit Theory and Applications","volume":"53 7","pages":"3902-3911"},"PeriodicalIF":1.8,"publicationDate":"2024-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://onlinelibrary.wiley.com/doi/epdf/10.1002/cta.4350","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144524944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Optimized Design of Full-Bridge LLC Planar Transformer Based on Variable-Width Windings 基于变宽绕组的全桥LLC平面变压器优化设计

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-11-10 DOI: 10.1002/cta.4348

Mingjian Yi, Ru Yang, Lebao Zhou, Hong Yang, Dongli Chen

引用次数: 0

A Novel Common-Ground Switched-Capacitor Type Dual-Mode Five-Level Transformer-Less Multilevel Inverter 一种新型共地开关电容型双模五电平无变压器多电平逆变器

IF 1.8 3区工程技术

International Journal of Circuit Theory and Applications Pub Date : 2024-11-10 DOI: 10.1002/cta.4347

Saniya Khan, Adil Sarwar, Mohammad Zaid, Shafiq Ahmad

引用次数: 0