2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)最新文献

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Equalization techniques for high data rates 高数据速率的均衡技术
D. Bucur, E. Goicea, N. Militaru
{"title":"Equalization techniques for high data rates","authors":"D. Bucur, E. Goicea, N. Militaru","doi":"10.1109/SIITME.2017.8259874","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259874","url":null,"abstract":"Signaling specification at multi gigabit-per-second clock rate have to be met independently of loss characteristics of the dielectric or conductive material, length or topology of interconnect. The lossy line should be equalized by different filter schemes to achieve the best performance of the route and to obtain a proper opening of the eye diagram. This paper emphasis the performance of an equalization filter variant considering the interconnect as a transmission line starting with synthesis of the filter and up to the fabrication of the test board. Applying on both electric and optics signaling, equalization is needed to avoid amplitude and phase distortion of the received pulse.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129901305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Project MECA: Training course in microsystems with piezoresistive feedback 项目MECA:压阻反馈微系统培训课程
V. Stavrov, G. Stavreva, E. Tomerov, D. Gieva, R. Radonov
{"title":"Project MECA: Training course in microsystems with piezoresistive feedback","authors":"V. Stavrov, G. Stavreva, E. Tomerov, D. Gieva, R. Radonov","doi":"10.1109/SIITME.2017.8259856","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259856","url":null,"abstract":"This paper presents a training course on practical aspects in design, technology and prototype fabrication of microsystems with piezoresistive feedback, exploiting the shared infrastructure. The course content is considered in the scope of building a sustainable Knowledge Alliance between the partners in Erasmus+ Project# 562206-EPP-1-2015-1-BG-EPPKA2-KA — MECA.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"241 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122470450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Education 4.0 — Fostering student's performance with machine learning methods 教育4.0 -用机器学习方法培养学生的表现
M. Ciolacu, A. Tehrani, Rick Beer, Heribert Popp
{"title":"Education 4.0 — Fostering student's performance with machine learning methods","authors":"M. Ciolacu, A. Tehrani, Rick Beer, Heribert Popp","doi":"10.1109/SIITME.2017.8259941","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259941","url":null,"abstract":"Educational activity is increasingly moving online and course contents are becoming available in digital format. This enables data collection and the use of data for analyzing learning process. For the 4th Revolution in Education, an active and interactive presence of students contributes to a higher learning quality. Machine Learning techniques recently have shown impressive development steps of the use of data analysis and predictions. However, it has been far less used for assessing the learning quality. For this paper we conducted analysis based on neural networks, support vector machine, decision trees and cluster analysis to estimate student's performance at examination and shape the next generation's talent for Industry 4.0 skills.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129315276","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 85
A study of losses in planar transformers with different layer structure 不同层状结构平面变压器损耗的研究
Constantin Ropoteanu, P. Svasta, C. Ionescu
{"title":"A study of losses in planar transformers with different layer structure","authors":"Constantin Ropoteanu, P. Svasta, C. Ionescu","doi":"10.1109/SIITME.2017.8259904","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259904","url":null,"abstract":"Planar transformers in DC-to-DC converters are attractive due to compactness at high power applications. Usually, converters work in the sub-MHz range and naturally the questions of losses both in-core and in-winding appears. The present work provides a comparative analysis of winding losses in two types of planar transformer PCB stack structure. The study aims to analyze the influence of winding arrangement on a step-up planar transformer over the leakage inductance based on the magneto motive force. The results show the impact of losses on the full converter in two FR4 structure embodiments: one with the secondary on a single inner layer and the second with the winding in multiple layers. For this approach a planar core transformer was modeled for sub-MHz range (0.4–1.0 MHz) analysis.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116919949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Implementing a remote laboratory on a chip 在芯片上实现远程实验室
O. Machidon, Alina L. Machidon, P. Cotfas, D. Cotfas
{"title":"Implementing a remote laboratory on a chip","authors":"O. Machidon, Alina L. Machidon, P. Cotfas, D. Cotfas","doi":"10.1109/SIITME.2017.8259880","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259880","url":null,"abstract":"In light of the recent advances in the Internet of Things and embedded networking technologies, online Internet access for computing devices has been extended from classic computers and servers to virtually all embedded devices with minimal networking capabilities. In this context, our efforts targeted applying this approach to the field of remote learning, by transcending the infrastructure needed for a remote laboratory from mainframe servers and computers to embedded devices: FPGA/System-on-Chip (SoC). This paper describes the internal architecture of a FPGA-based SoC with its components: networking interface (including a Web Server), data acquisition interface (through the on-board Analog-to-Digital converter) and configuration and control software. Also, the article presents the implementation of the Web interface available online that provides an easily accessible, real-time interactive interface for the data visualization and control of the remote FPGA-based SoC, which enables remote access for students and faculty to perform remote experiments and data analysis.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117100984","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A statistical estimation analysis of indoor positioning WLAN based fingerprinting 基于指纹识别的室内定位无线局域网统计估计分析
D. Năstac, Florentin Alexandru Iftimie, O. Arsene, Costei Cherciu
{"title":"A statistical estimation analysis of indoor positioning WLAN based fingerprinting","authors":"D. Năstac, Florentin Alexandru Iftimie, O. Arsene, Costei Cherciu","doi":"10.1109/SIITME.2017.8259898","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259898","url":null,"abstract":"The indoor positioning is a new topic in today's navigation and positioning research fields, which presents quite various challenging issues. A statistical approach to treat Wireless Local Area Network (WLAN) based fingerprinting using Received Signal Strengths (RSS) is described here. This study structures this approach as a time-series of the RSS and position data. Kalman filter is applied in order to improve the position prediction based on the measured RSS signal.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"391 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131580707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Multiprocessor visual servoing system for mobile robots servicing mechatronic lines 面向机电生产线移动机器人的多处理器视觉伺服系统
G. Petrea, V. Nicolau, M. Andrei
{"title":"Multiprocessor visual servoing system for mobile robots servicing mechatronic lines","authors":"G. Petrea, V. Nicolau, M. Andrei","doi":"10.1109/SIITME.2017.8259869","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259869","url":null,"abstract":"In quality control based on video monitoring and inspection, the advantages of video analyses using multiprocessor systems are well known. The processors compete or collaborate each-other, sharing spatial or temporal information from a video stream. In this paper, a low-cost and low-power multiprocessor system is proposed for real-time image processing. The system is used in the feedback loop for visual servoing which aims to control a wheeled mobile robot (WMR) equipped with a robotic manipulator (RM). It is master-slave architecture, with cheap but performance processors. The goal is to ensure fast image processing in order to control the RM for recovering the rejected work pieces and sending them to the quality test for reprocessing. The modular and flexible structure of multiprocessor visual servoing system is presented and analyzed.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126344065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Proof of concept mathemathical model of a modulation breaking the Shannon limit 打破香农极限的调制的概念数学模型的证明
M. Bujor
{"title":"Proof of concept mathemathical model of a modulation breaking the Shannon limit","authors":"M. Bujor","doi":"10.1109/SIITME.2017.8259913","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259913","url":null,"abstract":"Recent research in the field of spectral analysis shows oversampling helps extract significantly more information than conventional sampling, from the same signal in the same bandwidth. A modulation grouping time domain overlapping symbols is proposed, in order to utilize oversampling. Overlapped symbol groups are decoded with the help of a system of equations, as each symbol has a slightly different time position. Their values can thus be distinctively detected with a low error probability. The Shannon limit is considered in a complete form, i.e. error probability, beside bandwidth and signal to noise ratio determine the maximum rate of a channel. The simulation gives a rate about four times the Shannon limit without considering bits to be wasted on synchronization, which are not considered in the Shannon limit either. The modulation needs time synchronization like most digital modulations, e.g. OFDM, but there are enough bits left for it without falling behind the Shannon limit. The result suggests a new channel limit theorem is needed and more research has to be done on reaching it by oversampling the signal relative to the channel bandwidth.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"181 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132907138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A different approach for measurement of hysteresis losses in magnetic cores 一种测量磁芯磁滞损耗的不同方法
B. Evstatiev, Dimcho V. Kiriakov, I. Beloev
{"title":"A different approach for measurement of hysteresis losses in magnetic cores","authors":"B. Evstatiev, Dimcho V. Kiriakov, I. Beloev","doi":"10.1109/SIITME.2017.8259876","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259876","url":null,"abstract":"In the present study a novel approach for measurement of loses due to hysteresis in magnetic cores has been presented. The measurement system makes sure the measured voltages, representing the magnetic field B(t) and field intensity H(t), are in-phase in order to correctly obtain the losses. This is achieved through the use of two cascaded low-pass filters, whose cut-off frequencies are equal to the fundamental frequency. The performed experiment proved that the measured voltages are inphase and they can be used to correctly obtain the losses. The results are compared with situations where the two quantities are slightly out-of-phase, and the relative errors are evaluated.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133666932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Analysis of evaporation process of thin Ni films by factorial experiments and Taguchi approach 用析因实验和田口法分析镍薄膜的蒸发过程
P. Mach, S. Barto, Miroslav Cocían
{"title":"Analysis of evaporation process of thin Ni films by factorial experiments and Taguchi approach","authors":"P. Mach, S. Barto, Miroslav Cocían","doi":"10.1109/SIITME.2017.8259866","DOIUrl":"https://doi.org/10.1109/SIITME.2017.8259866","url":null,"abstract":"Parameters that influence thickness of evaporated Ni thin films were analyzed and their significance calculated. The knowledge of this information is necessary for optimum control of evaporation process. Influence of residual atmosphere pressure in the vacuum bell jar, of the temperature of the substrate and the mass of evaporated metal on the final thickness of the evaporated films were examined. The method of full factorial experiments and the method of Taguchi orthogonal arrays were used for the analysis. The results obtained by both the methods were compared and differences between the results were found. The differences were not significant and were caused by different range of an experimental basis in these methods.","PeriodicalId":138347,"journal":{"name":"2017 IEEE 23rd International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133092062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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