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Proceedings of International Electron Devices Meeting最新文献

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High-efficiency X-band GaInP/GaAs HBT MMIC power amplifier for stable long pulse and CW operation 高效的x波段GaInP/GaAs HBT MMIC功率放大器，稳定的长脉冲和连续工作
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.499337
K. Riepe, H. Leier, U. Seiler, A. Marten, H. Sledzik
{"title":"High-efficiency X-band GaInP/GaAs HBT MMIC power amplifier for stable long pulse and CW operation","authors":"K. Riepe, H. Leier, U. Seiler, A. Marten, H. Sledzik","doi":"10.1109/IEDM.1995.499337","DOIUrl":"https://doi.org/10.1109/IEDM.1995.499337","url":null,"abstract":"We report on the design and fabrication of high-efficiency monolithic X-band power amplifiers using a well optimized GaInP/GaAs heterojunction bipolar transistor (HBT) technology. Ballast resistors have been introduced to each emitter finger to avoid completely the current collapse effect and thus enabling long pulse and continuous wave (CW) operation. The amplifiers are designed for operation at moderate current densities to reduce junction temperature and to improve reliability. State-of-the-art performances with maximum output powers of 9 W with a power-added efficiency (PAE) of 42 % and peak power-added efficiencies of 45 % have been achieved at 10 GHz under critical long pulse conditions (pulse width=100 /spl mu/s, duty cycle=10 %). To our knowledge these results represent the best performance of any GaInP/GaAs HBT MMIC power amplifier considering efficiency, output power, operation frequency, and pulse conditions.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"72 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123045880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
High resolution tri-linear colour TDI CCD image sensor with programmable responsivity gain 具有可编程响应增益的高分辨率三线性彩色TDI CCD图像传感器
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.497202
S. Agwani, J. Miller, S. Chamberlain, W. Washkurak
{"title":"High resolution tri-linear colour TDI CCD image sensor with programmable responsivity gain","authors":"S. Agwani, J. Miller, S. Chamberlain, W. Washkurak","doi":"10.1109/IEDM.1995.497202","DOIUrl":"https://doi.org/10.1109/IEDM.1995.497202","url":null,"abstract":"We developed a 6032 element, 32 stage Tri-linear Time Delay and Integration Focal Plane Array for high resolution colour imaging applications. The sensor offers an improvement of a factor of 10 over comparable line scan CCD sensors. The imager architecture utilizes three individual TDI arrays, with a new multi-layer dielectric interference film (DIF) color filter or a dyed polyamide patterned monolithic filter that helps achieve accurate spectral separation in the three primary colour bands centered at 450 nm, 550 nm and 650 nm respectively. We also incorporated in the sensor a new programmable responsivity mechanism. This is achieved by an on-chip imaging area size selection mechanism. The sensors operate in the time-delay-and-integration mode. Depending on the level of illumination the user is able to dynamically select the number of TDI stages per sensor. The total number of TDI gain stages can be selected in blocks of 32, 16, 8, or 4. This property provides improvement in the dynamic range of the sensor by extending the response of the CCD over a wide range of illumination levels. Depending on the light energy incident on the sensor, the user can dynamically vary the number of TDI stages used for integrating an incident scene. The result is a programmable responsivity depending on the level of incident illumination. Such technique optimizes the performance of the CCD colour sensor.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123970728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Passive optical alignment of stacked multi-fiber tapes to a two-dimensional surface-emitting laser array 堆叠多光纤带与二维面发射激光阵列的无源光学对准
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.499290
K. Matsuda, T. Chino, T. Yoshida, Y. Kobayashi, K. Hatada
{"title":"Passive optical alignment of stacked multi-fiber tapes to a two-dimensional surface-emitting laser array","authors":"K. Matsuda, T. Chino, T. Yoshida, Y. Kobayashi, K. Hatada","doi":"10.1109/IEDM.1995.499290","DOIUrl":"https://doi.org/10.1109/IEDM.1995.499290","url":null,"abstract":"A simple method of coupling parallel fibers to a surface-emitting laser (SEL) array is proposed and demonstrated. The SEL chip has guiding holes on the backside which are aligned precisely to the SEL mesas on the front side. Simply inserting fibers to the guiding holes, optical coupling can be achieved. Three fiber tapes each of which includes four fibers are coupled to a 4/spl times/3 SEL array. Average coupling efficiency of 35.0% is obtained.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124005583","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Well concentration: a novel scaling limitation factor derived from DRAM retention time and its modeling 井浓度:一种新的缩放限制因子，源自DRAM保留时间及其建模
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.499365
T. Hamamoto, S. Sugiura, S. Sawada
{"title":"Well concentration: a novel scaling limitation factor derived from DRAM retention time and its modeling","authors":"T. Hamamoto, S. Sugiura, S. Sawada","doi":"10.1109/IEDM.1995.499365","DOIUrl":"https://doi.org/10.1109/IEDM.1995.499365","url":null,"abstract":"A novel scaling limitation factor derived from DRAM retention time and its modeling has been proposed. So far, the well concentration has been optimized from the viewpoint of the scaling of the transistor dimensions. However, it has been found that the DRAM retention time strongly depends on the well concentration. Increase of the well concentration enhances thermionic field emission (TFE) current from the storage node. This leakage current makes \"tail distribution\" of the retention time. Therefore, the well concentration must be optimized taking into account the retention time distribution.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115858987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
Novel current-voltage characteristics of an InP-based resonant-tunneling high electron mobility transistor and their circuit applications 基于inp的共振隧穿高电子迁移率晶体管的新型电流-电压特性及其电路应用
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.499219
K. Chen, K. Maezawa, M. Yamamoto
{"title":"Novel current-voltage characteristics of an InP-based resonant-tunneling high electron mobility transistor and their circuit applications","authors":"K. Chen, K. Maezawa, M. Yamamoto","doi":"10.1109/IEDM.1995.499219","DOIUrl":"https://doi.org/10.1109/IEDM.1995.499219","url":null,"abstract":"We report novel current-voltage characteristics in an InP-based resonant-tunneling high electron mobility transistor (RTHEMT). The RTHEMT incorporates a resonant-tunneling diode structure into the source region of a HEMT. A near-flat valley current is obtained in the current-voltage characteristics. This unique feature leads to the observation of negative transconductance throughout a wide range of source-drain bias. Using a simple circuit that combines an RTHEMT with a resistor load, we demonstrate frequency multipliers (both doubler and tripler) and a three-valued logic inverse literal gate.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115232846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
CMOS image sensors: electronic camera on a chip CMOS图像传感器:芯片上的电子相机
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.497174
E. R. Fossum
{"title":"CMOS image sensors: electronic camera on a chip","authors":"E. R. Fossum","doi":"10.1109/IEDM.1995.497174","DOIUrl":"https://doi.org/10.1109/IEDM.1995.497174","url":null,"abstract":"Recent advancements in CMOS image sensor technology are reviewed, including both passive pixel sensors and active pixel sensors. On-chip analog to digital converters and on-chip timing and control circuits permit realization of an electronic camera-on-a-chip.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125285746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1343
Accurate measurements for lateral distribution of interface traps by charge pumping and capacitance methods 用电荷泵送和电容法精确测量界面阱的横向分布
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.497178
H. Uchida, K. Fukuda, H. Tanaka, N. Hirashita
{"title":"Accurate measurements for lateral distribution of interface traps by charge pumping and capacitance methods","authors":"H. Uchida, K. Fukuda, H. Tanaka, N. Hirashita","doi":"10.1109/IEDM.1995.497178","DOIUrl":"https://doi.org/10.1109/IEDM.1995.497178","url":null,"abstract":"A new measurement method for lateral distribution of generated interface traps is proposed. This method consists of the charge pumping measurement and the gate-to-drain capacitance (C/sub gd/) measurement. The validity of the C/sub gd/ measurement is confirmed by two-dimensional device simulation. Experimental results using this method exhibit that the peak position of interface traps generated during hot carrier stress is nearer to the gate edge than that of maximum electric field. Moreover, the lateral distribution of generated interface traps is found to extend slightly when the generation rate is enhanced due to water in interdielectric films of n-channel MOSFET.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126078048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A new cell structure for sub-quarter micron high density flash memory 一种亚四分之一微米高密度快闪存储器的新单元结构
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.499193
Y. Yamauchi, M. Yoshimi, S. Sato, H. Tabuchi, N. Takenaka, K. Sakiyam
{"title":"A new cell structure for sub-quarter micron high density flash memory","authors":"Y. Yamauchi, M. Yoshimi, S. Sato, H. Tabuchi, N. Takenaka, K. Sakiyam","doi":"10.1109/IEDM.1995.499193","DOIUrl":"https://doi.org/10.1109/IEDM.1995.499193","url":null,"abstract":"A new cell structure named ACT (Asymmetrical Contactless Transistor) is proposed for high density data storage applications which require low voltage, low power consumption and fast program/erase. The ACT cell with a lightly doped source and heavily doped drain realizes a simple virtual ground array using the Fowler-Nordheim (FN) tunneling mechanism for both program and erase. A self-aligned floating-gate wing technology is introduced to increase gate coupling ratio in word-line direction without sacrificing cell area. A cell area as small as 0.39 /spl mu/m/sup 2/ with a coupling ratio of 0.55 is obtained using 0.3 /spl mu/m process technology. The low programming current of the ACT cell enables multiple programming to be used and thus it is possible to achieve fast programming (<1 /spl mu/s/byte) with a low single supply voltage (<3 V). A good disturb immunity in program, erase and read modes is also obtained.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125114023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
High power 4H-SiC static induction transistors 大功率4H-SiC静电感应晶体管
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.499213
R. Siergiej, R. C. Clarke, A.K. Aganval, C. Brandt, A. Burk, A. Morse, P. A. Orphanos
{"title":"High power 4H-SiC static induction transistors","authors":"R. Siergiej, R. C. Clarke, A.K. Aganval, C. Brandt, A. Burk, A. Morse, P. A. Orphanos","doi":"10.1109/IEDM.1995.499213","DOIUrl":"https://doi.org/10.1109/IEDM.1995.499213","url":null,"abstract":"Static induction transistors have been demonstrated in 4H-SiC. SiC specific semiconductor processing technologies such as epitaxy, reactive ion etching, and sidewall Schottky gates were employed. Under pulsed power test conditions, 4H-SiC SITs developed a maximum output power of 225 W at 600 MHz, a power added efficiency of 47%, and a gain of 8.7 dB. Maximum channel current was 1 A/cm, and the maximum blocking voltage was 200 V.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"240 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123490260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
Oxide-field dependence of the NMOS hot-carrier degradation rate and its impact on AC-lifetime prediction NMOS热载子降解率的氧化场依赖性及其对交流寿命预测的影响
Proceedings of International Electron Devices Meeting Pub Date : 1995-12-10 DOI: 10.1109/IEDM.1995.497177
S.A. Kim, B. Menberu, T.E. Kopley, J. E. Chung
{"title":"Oxide-field dependence of the NMOS hot-carrier degradation rate and its impact on AC-lifetime prediction","authors":"S.A. Kim, B. Menberu, T.E. Kopley, J. E. Chung","doi":"10.1109/IEDM.1995.497177","DOIUrl":"https://doi.org/10.1109/IEDM.1995.497177","url":null,"abstract":"This study presents a general relationship between the NMOS hot-carrier degradation rate n and the oxide-electric field at the drain E/sub ox/, which is valid over a wide range of stress-bias conditions and device parameters. Physical mechanisms for this oxide-field dependence are explored. It is also shown that failure to account for the oxide-field dependence of n and the inherent non-linearity of the degradation time dependence can result in significant overestimation of the predicted AC lifetime.","PeriodicalId":137564,"journal":{"name":"Proceedings of International Electron Devices Meeting","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121594157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
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