2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)最新文献

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Moisture induced corrosion in gold and copper ball bonds 湿气引起的金和铜球键的腐蚀
C. Breach, Tee Wai Mun, T. Lee, R. Holliday
{"title":"Moisture induced corrosion in gold and copper ball bonds","authors":"C. Breach, Tee Wai Mun, T. Lee, R. Holliday","doi":"10.1109/IEMT.2010.5746748","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746748","url":null,"abstract":"High gold prices have led to renewed interest in replacing gold with copper in existing packages and new packages in order to save costs. Although reliability is often cited as a reason for using copper, the main driving force for its use is undoubtedly cost. Perceptions that copper wire is more reliable are based on the notion that the intermetallics grow more slowly and that thinner intermetallics are more reliable and yet old data tend to support the idea that copper is as reliable as gold. More recently however, copper ball bonds on aluminium metallization have been found to fail more than gold during temperature cycling (TMCL) and pressure cooker testing (PCT) [1–3]. The key feature of these tests is the presence of moisture than appears to accelerate corrosion. A proposed solution to this problem is Pd-coated Cu wire, which looks to be a promising but relatively untested solution at present [1–4]. While Pd-coated copper wire may improve reliability, cost-savings will be less compared with bare copper wire. It is important to note however that a recent SEMI survey shows that industry is generally not as confident in copper as wire equipment and materials suppliers [5]. Localized corrosion of aluminium bond pads is well known in microelectronics packaging and in Al-Cu and Al-Cu-Si bond pads, CuAl2 acts as a cathode and aluminium corrodes in the presence of water (electrolyte) [6]. The situation is complicated by the presence of chlorine and other ionic contaminants in addition to moisture. In copper ball bonds, intermetallic coverage in as-bonded balls is very difficult to see but it appears that CuAl2 and Cu9Al4 are the compounds that form initially [7]. Intermetallic growth of Cu-Al compounds is slow compared to Au-Al compounds, which means that in finished packages, a large amount of Al remains whereas in gold ball bonds, with thin 1µm bond pads, aluminium can easily be consumed after encapsulation and moulding and surface mounting. It is plausible that during extended periods of exposure to moisture, stress and ionic contaminants, Cu ball bonds may be more susceptible to localized corrosion than Au ball bonds because slow intermetallic growth permits aluminium corrosion. This paper discusses ball bond corrosion and suggests that for high reliability applications or applications in moist environments, it may be necessary to accelerate the growth of Cu-Al intermetallics to mitigate potential corrosion and failure.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121330532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Solving eventual bonding quality to enhance adhesion for QFN packages 解决最终的粘合质量,以提高QFN封装的附着力
Suresh Kumar, S. Sivarao, M. Cheong, M. Azmeer, Harun Fuaida
{"title":"Solving eventual bonding quality to enhance adhesion for QFN packages","authors":"Suresh Kumar, S. Sivarao, M. Cheong, M. Azmeer, Harun Fuaida","doi":"10.1109/IEMT.2010.5746711","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746711","url":null,"abstract":"Many of the components used extensively in today's handheld market are beginning to migrate from traditional lead frame design to leadless or non leaded. The primary driver for handheld manufacturers is the saved PC board space created by these components' smaller mounting areas. In addition, most components also have reductions in weight and height, as well as an improved electrical performance. As critical chip scale packages are converted to non- leaded designs, the additional space saved can be allocated to new components for added device functionality Similar to leaded components, nonleaded designs use wire bond as the primary interconnection between the IC and the frame. However, due to the unique land site geometry and form factor density, traditional wire bond processes may not produce high yielding production. For these designs, additional wire bond capabilities and alternate processes are needed to produce acceptable production yields. This paper discusses the eventual challenges of wire bond for QFN package designs and describes how new wire bond capabilities and process optimization can improve production yields but on top of the impact need to be consider as well during the higher force impact which could deteriorate the looping profile on the adjacent wire. The advantages of the conversion of the design which could improve the conversion rate on the production.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121357679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effect of convection and conduction oven to the intermetallic formation and solder joint reliability 对流和传导炉对金属间形成和焊点可靠性的影响
Y. W. Wei, Tan Chin Wei Ronnie
{"title":"Effect of convection and conduction oven to the intermetallic formation and solder joint reliability","authors":"Y. W. Wei, Tan Chin Wei Ronnie","doi":"10.1109/IEMT.2010.5746687","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746687","url":null,"abstract":"This paper presents the effect of the reflow oven type to the intermetallic (IMC) formation and solders joint reliability for the wafer level packages (WLPs). Two common used reflow oven in electronic manufacturing industry which are conduction and convection oven have been studied. Four reflow profiles with same peak temperature and wetting time for both ovens were developed. In this study, two low (240°C) and high (255°C) peak temperature were investigated. SAC107 solder ball with Cu UBM pads of WLP daisy chain were reflowed by using each ovens. The formation of IMC was observed at the interface of the solder and Cu UBM pad and found that oven type is significantly influence the IMC formation. The reflow profile for convection oven produced longer IMC needles and visible over the whole UBM pad. On the other hand, IMC needles are only visible at the perimeter of the pad for the conduction oven. Drop Test (DT) and Temperature Cycle Test (TCT) were used to evaluate the solder joint reliability. From the board level test results, solder balls reflowed by convection oven have achieved better thermal performance than conduction oven. Failure analysis was performed on the TCT units and found that crack line propagated in the solder bump but not in the IMC layer as the IMC needles acts as a barrier to crack propagation. With the 25% improvement in TCT performance by convection oven, Infineon Technologies is now exceeding customer expectation and sustaining competitive advantage in WLP market.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115553953","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fabrication of silica/epoxy thin film composite for electronic packaging application 电子封装用二氧化硅/环氧薄膜复合材料的制备
You Foo, M. Mariatti, A. Azizan, L. Sim
{"title":"Fabrication of silica/epoxy thin film composite for electronic packaging application","authors":"You Foo, M. Mariatti, A. Azizan, L. Sim","doi":"10.1109/IEMT.2010.5746733","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746733","url":null,"abstract":"Conventional packaging technology has been replaced in line with the miniaturization trends of the product designs in electronic industry. A polymer resin needs to suit to certain polymer processing methods in order to achieve substantial performance in terms of mechanical, thermal, optical, electrical and so forth. In this study, an epoxy based thin film composite was successfully fabricated by using the spin coating method. Comparing this with the conventional method such as dip coating, solution casting and hot pressing methods, spin coating fabrication method allows controllable-uniform thickness ranging from micron to nanometer. In order to enhance the thermal, mechanical and its dimensional stability, two types of silica fillers which are in micron and nano-sized were studied. The nano-sized silica was found to further enhance the properties of the epoxy thin film at low weight fraction. This is due to its higher ratio of surface area to volume compared to the micron-sized silica.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130823013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Impacts to fine pitch copper wire bonding quality by external airflow 外部气流对细节铜线粘接质量的影响
Loh Lee Jeng, Loh Kian Hwa, Ng Wen Chang
{"title":"Impacts to fine pitch copper wire bonding quality by external airflow","authors":"Loh Lee Jeng, Loh Kian Hwa, Ng Wen Chang","doi":"10.1109/IEMT.2010.5746665","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746665","url":null,"abstract":"Smaller diameter Cu wire has been incorporated in actual volume production and migrated into fine pitch IC packages in the past few years. Copper is easily oxidized by forming copper oxide that will hinder the welding process between copper to Aluminum bond pad surface. Forming gas must be used to protect the copper from reacting with oxygen for this reason. Intensive studies that focused on EFO parameter, inert gas flow rate and wire types were mainly conducted to achieve robust FAB (free air ball) process in the past. The key for a reliable finer copper ball process is not only the formation of defect-free FAB during EFO sparks stage but slight oxidation during search stage and bonding stage shall not be neglected. This paper discusses the issues and challenges encountered during the development of ultra fine copper ball. It also covers the impacts to the quality of ultra fine copper balls by possible oxidation during search stage, bonding stage and external air flow or air turbulence. Performance and resistance to disturbance by external air flow using different nozzles design from ASM are also compared in this paper.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116922012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A study on the effect of mold compound moisture related properties and leadframe dimension on the reliability of IC packages using an integrated mechanical modeling approach 采用集成力学建模方法研究了模具复合材料水分相关特性和引线框尺寸对IC封装可靠性的影响
S. Chin, E. Erfe
{"title":"A study on the effect of mold compound moisture related properties and leadframe dimension on the reliability of IC packages using an integrated mechanical modeling approach","authors":"S. Chin, E. Erfe","doi":"10.1109/IEMT.2010.5746691","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746691","url":null,"abstract":"Due to production cost conscious, high density (HD) packaging is gaining importance with high volume production but less material usage. However, significantly extended periods of wire bond operations in HD packaging can render aggressive leadframe oxidation. Since epoxy's bond to copper oxide is often stronger than the bond between copper oxide and the leadframe base metal [17], oxide to leadframe delamination likely to occur under stress condition and inevitably causing subsequent popcorn package cracking. Hence it is desirable that the package is designed to have strong resistance to this delamination. This paper aims at finding out suitable polymeric material and leadframe dimension that can mitigate the hygro-thermo vapor pressure induced stresses and hence delamination growth at the EMC to top die pad interface of IC package for HD packaging. A two-dimensional Non Fickian moisture absorption and desorption FEA model is firstly applied to quantify the wetness at the interface post Moisture Sensitivity Level (MSL) 1 under 85°C/85%RH and at peak IR reflow temperature 260°C. The critical interface is found to be far from the saturation after MSL 1. After exposed to solder reflow, the wetness along the interface is noted to remain intact as compared to post MSL 1 while the package exterior witnessing a substantial drop. Evaluation was conducted on four different EMCs. The variation of the residual moisture at the interface between various EMCs is found to be considerable small. For instance, MC-D exhibits 47–65% saturation along the interface against 54–70% saturation for MC-B at 260°C. An analytical 2D model with thermo-hygro-vapor pressure mechanical coupling effect is then used to numerically predict the peeling and shear stresses along the critical interface for various investigated EMCs. Although the assumption of uniform saturated moisture distribution made in the constitutive coupling model does not reflective of the real case of moisture gradient and hence vapor pressure variety along the interface, it does not much affect the qualitative prediction of the improved EMC due to minor variation of the wetness at the interface between EMCs as determined by the preceding diffusion model. Analysis addresses EMC formulated with low modulus, low coefficient of thermal expansion (CTE), low saturated moisture concentration (Csat) and low coefficient of moisture expansion (CME) at peak reflow temperature exhibits enhanced performance. These predicted results match well with the C-SAM results. Apart from these, both interfacial shearing and peeling stresses were found to play comparable role for delamination initiation at top die pad corner. Conversely, interfacial peeling stress is identified as a major cause of delamination that initiated from the region close to die attach. Also covered is the die pad size optimization analysis. Indeed, it has been a lump sum of analyses focusing on the evaluation of possible adhesion improvement through chemical","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114683790","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Multiple quantum wells GaInNAs for ridge-wave-guide laser diodes 用于脊波导激光二极管的多量子阱gainna
N. A. Abdul Manaf, M. Alias, S. Mitani, M. Yahya
{"title":"Multiple quantum wells GaInNAs for ridge-wave-guide laser diodes","authors":"N. A. Abdul Manaf, M. Alias, S. Mitani, M. Yahya","doi":"10.1109/IEMT.2010.5746766","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746766","url":null,"abstract":"The high demand for long wavelength lasers has led to the investigation of GaInNAs material. GaInNAs multiple-quantum-wells (MQWs) with different QW numbers have been studied for ridge waveguide (RWG) lasers. The emission wavelengths of the lasers are in the range of 1310 nm. Significant improvements of emission wavelength and output power were demonstrated with increasing QW numbers. We believed that that the number of QWs used in the devices is limited by the crystalline quality of the GaInNAs material. The emission wavelength is much more improved by increment of QW numbers. A smaller QW numbers are suitable for lower threshold current and higher differential quantum efficiency while a larger QW numbers can achieve a less output power. The higher threshold current is due to the approximately saturated threshold current density and the increments of the active volume. Further comparisons on the devices performance with variation of QW numbers will be report.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122681537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Integrated solution for high speed data filtering using package-in-package approach 采用包中包方法的高速数据过滤集成解决方案
Bih Wen Fon, Atapol Prajuckamol
{"title":"Integrated solution for high speed data filtering using package-in-package approach","authors":"Bih Wen Fon, Atapol Prajuckamol","doi":"10.1109/IEMT.2010.5746697","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746697","url":null,"abstract":"In addressing emerging high speed interface such as USB 2.0, IEEE1394, LVDS and DVI in electronic devices, discrete solution of using choke and ESD diodes is a common practice in the PCB assembly in eliminating the common mode noise and providing ESD protection to the electronice device [1]. However, this brings up the cost and cycle time as PCB manufacturers have to purchase several components and mount them separately on the PCB. Consequently, a larger PCB footprint is required. In this paper, we introduced the first-to-market integrated common mode filter with ESD protection using package-in-package technology in DFN platform. This is an integrated solution that offers cost savings and space reduction in responds to the needs of portable digital devices which are increasingly smaller and thinner. The attachment of passive component in a DFN package adds complexity to the existing assembly process. The use of lead free solder paste and its selection were discussed in this paper. Solder printing on lead frame was employed for the component placement due to its high process throughput compared to the conventional dispensing method. This paper also elaborated on the stencil design and solder printing characterization. It included the modification in lead frame design to enhance the product quality. The effect of solder reflow was also addressed in the paper. The final product was assembled with the newly established process flow and passed MSL 1 @ 260°C reliability test. The integrated package passed the reliablity stress tests and validated the concept of package-in-package in DFN platform.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122870742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Enablers of robust sub-40 micrometer ultra fine pitch ball bonding 实现坚固的40微米以下的超细间距球粘合
Shawn D. Sarbacker, D. Schalcosky
{"title":"Enablers of robust sub-40 micrometer ultra fine pitch ball bonding","authors":"Shawn D. Sarbacker, D. Schalcosky","doi":"10.1109/IEMT.2010.5746741","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746741","url":null,"abstract":"As device manufacturers execute their roadmaps, die shrinks are leading to progressively finer bond pad pitches with consequently smaller bond pad openings on which first bonds are placed. Bond pad pitches as low as 40 micrometers are currently in production with near-term roadmaps pushing to 35 micrometers and below. Based on statistical process capability models aligned with production process parameters, this paper will discuss how decisions made at the device, package, and equipment levels influence ultra fine pitch wire bonding process capability. Discussion will include equipment capability, wire and process selection, process specification, and device and package design considerations. Recommendations are made for how device manufacturers, package designers, and equipment manufacturers can work together to facilitate a smooth transition to sub-40 micrometer wire bonding.","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129421086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The practice of engineering in the year of the tiger 虎年的工程实践
William Chen
{"title":"The practice of engineering in the year of the tiger","authors":"William Chen","doi":"10.1109/IEMT.2010.5746758","DOIUrl":"https://doi.org/10.1109/IEMT.2010.5746758","url":null,"abstract":"In this Year of the Tiger the economy is recovering from one of the worst economic crisis of recent years. The global electronics industry has experienced significant consolidations with changes in leadership and new players. The electronics market is brimming with new and exciting electronic products for the ever more connected world. Since the invention of transistor some sixty odd years ago, the progress of electronics has been paced by Moore's Law, and packaging has been an important contributor. With the ascendancy of the consumer market, the function and realm of electronic products have increased many folds, and speed and performance are no longer the sole driver. In this era of More Moore and More than Moore, packaging technology has become the critical enabler for the electronics industry. For the packaging engineering professionals the last decade has been a period of blossoming of many innovations and steady technology advancements. And the pace had not slackened. Cu wirebond is infiltrating the gold wirebond space that has long been occupied since the invention of integrated circuits some sixty years ago. Flip chip CSP and Wafer level CSP are becoming mainstream. And the traditional high lead and eutectic solder materials are being replaced by lead free solder and copper bump. With the advent of deep submicron nodes the study of chip-package interaction is crucial. In the meantime the world of 3D packaging is evolving in measured pace from die stacking, to package on package (POP) and Package in Package (PIP), towards wafer-level fan-out and 2.5 D and 3D IC. Are they real disruptive technologies? And an equally relevant question is Disruptive for Whom? This talk will examine the market landscape and technology trends from the perspective of packaging engineers, and ask ourselves a different and crucial question “how is practice the engineering changing in this Year of the Tiger?”","PeriodicalId":133127,"journal":{"name":"2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128589704","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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