2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)最新文献

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Sub-continuum thermal simulations of deep sub-micron devices under ESD conditions 深亚微米器件在ESD条件下的亚连续热模拟
P. Sverdrup, K. Banerjee, C. Dai, W. Shih, R. Dutton, K. Goodson
{"title":"Sub-continuum thermal simulations of deep sub-micron devices under ESD conditions","authors":"P. Sverdrup, K. Banerjee, C. Dai, W. Shih, R. Dutton, K. Goodson","doi":"10.1109/SISPAD.2000.871205","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871205","url":null,"abstract":"The decreasing dimensions of IC devices is rendering the heat diffusion equation highly inaccurate for simulations of electrostatic discharge (ESD) phenomena. As dimensions of the heated region in the device are reduced far below 200 nm, neglecting the ballistic, sub-continuum nature of phonon conduction in the silicon lattice can strongly underpredict the temperature rise. This work integrates the phonon Boltzmann transport equation (BTE) in deep sub-micron silicon devices and presents a general methodology for solving the BTE. The approach developed is applicable to both Si and SOI devices and predicts temperature rises consistent with failure voltage measurements for practical devices.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131295431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Prediction of SiO/sub 2/ sputtering yield using molecular dynamics simulation 用分子动力学模拟方法预测SiO/ sub2 /溅射产率
Kyusang Lee, Tai-kyung Kim
{"title":"Prediction of SiO/sub 2/ sputtering yield using molecular dynamics simulation","authors":"Kyusang Lee, Tai-kyung Kim","doi":"10.1109/SISPAD.2000.871246","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871246","url":null,"abstract":"The surface of processed wafers during the plasma etching process is exposed to a shower of relatively high energy particles, and the surface reaction that evaporates the upper surface layer is induced by the collision. The surface profile evolution during plasma etching needs to be known in order to control the fine details of features of semiconductor devices. The process is a complex combination of factors such as incident particle kinetic energy, incident angle and substrate conditions. In this study, we performed molecular dynamics simulations of Ar/sup +/ ions bombarding a SiO/sub 2/ substrate and observed the sputtering yield as the incident angle and energy changes. The primary goal is to verify the process as a reliable source of microscopic sputtering yield data. We inserted 10 ps of relaxation right after each bombardment to allow the concentrated heat to diffuse into the bulk region, which gave us similar results to a previous study (Abrams and Graves, J. Vac. Sci. Tech. A vol. 16, pp. 3006-3019, 1998), and we observed the surface evolution during the process. These efforts predicted a different sputtering yield from the previous study, but the overall patterns of reaction product trajectories were similar.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126758010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Improved device technology evaluation and optimization 改进了器件技术评价和优化
D. Connelly, M. Foisy
{"title":"Improved device technology evaluation and optimization","authors":"D. Connelly, M. Foisy","doi":"10.1109/SISPAD.2000.871231","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871231","url":null,"abstract":"The conventional I/sub Dsat/-I/sub DL/ (where I/sub Dsat/ is drain current for V/sub DS/=V/sub GS/=V/sub DD/ with V/sub BS/=0, and I/sub DL/ is drain current for V/sub DS/=V/sub DD/, with V/sub GS/=V/sub BS/=0) curve falls short in predicting which of two technology options will result in the best circuit performance. Here, for the first time, we demonstrate an improved evaluation method which accounts for process variation and leakage current budgeting for a target gate length. By using iteration or interpolation to compare tuned technologies, and by evaluating leakage and drive currents from the appropriate portions of their distribution curves, more effective optimization is achieved, giving stronger weight to robust device design.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116839419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Generic approaches to parasitic extraction problems [IC interconnects] 寄生提取问题的一般方法[集成电路互连]
J. Phillips
{"title":"Generic approaches to parasitic extraction problems [IC interconnects]","authors":"J. Phillips","doi":"10.1109/SISPAD.2000.871211","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871211","url":null,"abstract":"Integral equation methods have become popular for electromagnetic analysis problems such as computation of interconnect parasitics. However, developing integral equation codes that can treat diverse physics and interface with solvers in other domains requires algorithms that can easily be adapted to a variety of geometrical descriptions, solver interfaces, and integral equation formulations. In this paper, we survey some of the most popular fast integral equation solution techniques with mind to their flexibility in dealing with diverse problem domains.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114790017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Simulation of gallium-arsenide based high electron mobility transistors 基于砷化镓的高电子迁移率晶体管的模拟
R. Quay, H. Massler, W. Kellner, T. Grasser, V. Palankovski, S. Selberherr
{"title":"Simulation of gallium-arsenide based high electron mobility transistors","authors":"R. Quay, H. Massler, W. Kellner, T. Grasser, V. Palankovski, S. Selberherr","doi":"10.1109/SISPAD.2000.871210","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871210","url":null,"abstract":"We present results for hydrodynamic simulations of pseudomorphic AlGaAs-InGaAs-GaAs high electron mobility transistors (HEMTs) obtained by the MINIMOS-NT two-dimensional device simulator. The concise analysis of industrially relevant HEMT power devices of two different foundries for gate-lengths between l/sub g/=140 nm and l/sub g/=300 nm is carried out. Several aspects, including thermal and breakdown effects, the insulator-semiconductor interface, and the Schottky contact are considered.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121743988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
SOI related simulation challenges with moment based BTE solvers 基于矩的BTE求解器的SOI相关仿真挑战
J.L. Egley, B. Polsky, B. Min, E. Lyumkis, O. Penzin, M. Foisy
{"title":"SOI related simulation challenges with moment based BTE solvers","authors":"J.L. Egley, B. Polsky, B. Min, E. Lyumkis, O. Penzin, M. Foisy","doi":"10.1109/SISPAD.2000.871253","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871253","url":null,"abstract":"We discuss challenges particular to SOI simulation. We also show evidence of what we believe is hot carrier diffusion out of the channel near the drain, giving rise to a negative differential conductivity (NDC), or a transient region in an I/sub D/-V/sub D/ curve on SOI.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122898252","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A fast three-dimensional MC simulator for tunneling diodes 隧道二极管的快速三维MC模拟器
M. Wagner, H. Mizuta, K. Nakazato
{"title":"A fast three-dimensional MC simulator for tunneling diodes","authors":"M. Wagner, H. Mizuta, K. Nakazato","doi":"10.1109/SISPAD.2000.871199","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871199","url":null,"abstract":"A fast simulator is presented for 3D vertical tunneling devices with lateral confinement and gates. The tunneling current across each barrier is calculated using a combination of 3D ray tracing, Monte Carlo ensemble averaging, and a multi-grid Poisson solver, until self-consistency of the current is achieved.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117239853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A physics-based empirical pseudopotential model for calculating band structures of simple and complex semiconductors 计算简单和复杂半导体能带结构的基于物理的经验赝势模型
G. Pennington, N. Goldsman, J.M. McGarrity, F. Crowne
{"title":"A physics-based empirical pseudopotential model for calculating band structures of simple and complex semiconductors","authors":"G. Pennington, N. Goldsman, J.M. McGarrity, F. Crowne","doi":"10.1109/SISPAD.2000.871250","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871250","url":null,"abstract":"The full zone band structure is often needed for adequate simulation of semiconductor devices. It is important for devices operating under high power and high fields and determines many material properties. The computational ease and good accuracy of the empirical pseudopotential method (EPM) make it the band structure method of choice for full-zone simulations. While the EPM works well for most diamond and zincblende semiconductors, it becomes less effective for more complicated structures with larger unit cells. For these materials, more EPM parameters must be fitted while less experimental data is usually available. Through the adaption of the nonlocal atomic model potential of Heine and Animalu (Phil. Mag. vol. 12, pp. 1249-1269, 1965), we have developed a model empirical pseudopotential which, by drastically reducing the fitting parameters needed, can extend the use of the EPM to semiconductors with large unit cells. The method is effectively applied to the band structure calculations of Si, C, 3C-SiC, 4H-SiC, and 6H-SiC here.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116317892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Direct solution of the Boltzmann transport equation in nanoscale Si devices 纳米硅器件中玻尔兹曼输运方程的直接解
K. Banoo, M. Lundstrom, R.K. Smith
{"title":"Direct solution of the Boltzmann transport equation in nanoscale Si devices","authors":"K. Banoo, M. Lundstrom, R.K. Smith","doi":"10.1109/SISPAD.2000.871204","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871204","url":null,"abstract":"We report the first direct numerical solution to the Boltzmann transport equation (BTE) without making any approximations about the angular shape of the distribution function or the collision integral. The mathematical and numerical techniques used for solving this problem are discussed and shown to have the correct properties for semiconductor simulation. The applications of this method are general and are demonstrated here, for both one-dimensional (50 nm n/sup +/-p-n/sup +/) and two-dimensional (50 nm ultra-thin body dual-gate nMOSFET) devices.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"42 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125750561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Extraction of (R,L,C,G) interconnect parameters in 2D transmission lines using fast and efficient numerical tools 利用快速高效的数值工具提取二维传输线(R,L,C,G)互连参数
F. Charlet, C. Bermond, S. Putot, G. Le Carval, B. Fléchet
{"title":"Extraction of (R,L,C,G) interconnect parameters in 2D transmission lines using fast and efficient numerical tools","authors":"F. Charlet, C. Bermond, S. Putot, G. Le Carval, B. Fléchet","doi":"10.1109/SISPAD.2000.871214","DOIUrl":"https://doi.org/10.1109/SISPAD.2000.871214","url":null,"abstract":"We present a new simulation method for a fast and efficient extraction of frequency dependent R,L,C,G parameters in 2D transmission line structures embedded in a multilayered dielectric environment. Our method is based on two variational finite element formulations and use very efficient numerical tools (fictitious domain approach (Putot et al., 1999), fast solver, domain decomposition). It needs only an unstructured mesh of the conductor boundaries and is very memory and CPU time efficient. The results are validated on test structures with an original method of measurements and characterization.","PeriodicalId":132609,"journal":{"name":"2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133557210","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
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