Improved device technology evaluation and optimization

The conventional I/sub Dsat/-I/sub DL/ (where I/sub Dsat/ is drain current for V/sub DS/=V/sub GS/=V/sub DD/ with V/sub BS/=0, and I/sub DL/ is drain current for V/sub DS/=V/sub DD/, with V/sub GS/=V/sub BS/=0) curve falls short in predicting which of two technology options will result in the best circuit performance. Here, for the first time, we demonstrate an improved evaluation method which accounts for process variation and leakage current budgeting for a target gate length. By using iteration or interpolation to compare tuned technologies, and by evaluating leakage and drive currents from the appropriate portions of their distribution curves, more effective optimization is achieved, giving stronger weight to robust device design.