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2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)最新文献

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Modeling and measurement of high-bandwidth and high-density silicone rubber socket for 100Gbps transceiver IC test 100Gbps收发器IC测试用高带宽高密度硅橡胶插座的建模与测量
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-12-07 DOI: 10.1109/EPEPS.2015.7347141
Junyong Park, Hyesoo Kim, Jonghoon J. Kim, Hyosup Won, Bumhee Bae, Joungho Kim, Michael Bae, Dongho Ha
{"title":"Modeling and measurement of high-bandwidth and high-density silicone rubber socket for 100Gbps transceiver IC test","authors":"Junyong Park, Hyesoo Kim, Jonghoon J. Kim, Hyosup Won, Bumhee Bae, Joungho Kim, Michael Bae, Dongho Ha","doi":"10.1109/EPEPS.2015.7347141","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347141","url":null,"abstract":"In this paper, an RLGC model of a silicone rubber socket is proposed and compared with simulation results. Due to the reusability of the silicone rubber socket, it is suitable for a reliable test. In addition, its electrical performance is compared with that of conventional solder balls. The performance of the two are compared using measurements in both frequency and time domains. Their eye diagrams are nearly identical at the data rate of 28Gbps, which is the data rate of a single channel in a 100Gbps transceiver IC that consists of 4 parallel channels.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131242684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A stabilized leapfrog scheme for circuit-based analysis of power delivery network 一种基于电路的输电网络分析的稳定跨越式方案
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-12-07 DOI: 10.1109/EPEPS.2015.7347121
T. Sekine, H. Asai
{"title":"A stabilized leapfrog scheme for circuit-based analysis of power delivery network","authors":"T. Sekine, H. Asai","doi":"10.1109/EPEPS.2015.7347121","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347121","url":null,"abstract":"This paper describes an explicit leapfrog scheme that is stabilized for an arbitrary time step size in the fast transient simulation of a power delivery network (PDN). A time step size used in a basic explicit leapfrog scheme becomes too small if there exist extremely-small reactances in a circuit. Because such small reactances are usually extracted from small meshes, the basic leapfrog scheme is not suitable for the simulation including electrically-small objects, such as small apertures on a conductor plane of a PDN. The proposed stabilized leapfrog scheme can remove instability related to the low reactances and enables to use a relatively-large time step size which is not limited by a numerical stability condition. The proposed method is applied to the transient simulation of an example PDN to demonstrate its accuracy and efficiency. Numerical results show that our approach successfully avoids the time step size limitation and can perform much faster simulation than existing solvers.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122897373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Enhanced macromodels of high-speed low-power differential drivers 高速低功耗差分驱动器的增强宏模型
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-12-07 DOI: 10.1109/EPEPS.2015.7347122
G. Signorini, C. Siviero, I. Stievano, S. Grivet-Talocia
{"title":"Enhanced macromodels of high-speed low-power differential drivers","authors":"G. Signorini, C. Siviero, I. Stievano, S. Grivet-Talocia","doi":"10.1109/EPEPS.2015.7347122","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347122","url":null,"abstract":"High-speed differential interfaces implementing specific solutions for low-power consumption and low-EMI disturbances are vastly used in mobile platforms. In these devices, the slew rate is suitably controlled, the communication scheme alternates data-bursts followed by power-saving states, the voltage swing and the common-mode level are reduced. To achieve these targets, a key role in voltage-mode output drivers is played by an internal voltage-regulator. The latter exhibits a rich dynamic behavior, with non-negligible effects on the transmitter outputs, that need to be carefully characterized. In this paper, a modeling strategy based on a few key enhancements of state-of-the-art solutions is presented, leading to compact and accurate models. The feasibility and strengths of the proposed approach are verified on a low-power high-speed voltage-mode driver.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"130 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131599966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Process robustness and reproducibility of sub-mm wave flip-chip interconnect assembly 亚毫米波倒装芯片互连组装的工艺稳健性和可重复性
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-12-07 DOI: 10.1109/EPEPS.2015.7347148
S. Monayakul, S. Sinha, F. Schmuckle, M. Hrobak, D. Stoppel, O. Kruger, B. Janke, N. Weimann
{"title":"Process robustness and reproducibility of sub-mm wave flip-chip interconnect assembly","authors":"S. Monayakul, S. Sinha, F. Schmuckle, M. Hrobak, D. Stoppel, O. Kruger, B. Janke, N. Weimann","doi":"10.1109/EPEPS.2015.7347148","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347148","url":null,"abstract":"The design margins for sub-mm-wave flip-chip transitions in three different topologies, coplanar-to-coplanar, stripline-to-coplanar, and stripline-to-stripline, were verified with the realization and S-parameter measurement of passive chip assemblies, which contain the same wiring architecture as our InP DHBT circuit integration. High yield was observed, and less than 2 dB insertion loss per transition was measured above 300 GHz on the stripline-to-stripline design.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129345570","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Performace modeling and optimization for on-chip interconnects in memory arrays 存储器阵列片上互连的性能建模与优化
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-12-07 DOI: 10.1109/EPEPS.2015.7347150
J. Mohseni, C. Pan, A. Naeemi
{"title":"Performace modeling and optimization for on-chip interconnects in memory arrays","authors":"J. Mohseni, C. Pan, A. Naeemi","doi":"10.1109/EPEPS.2015.7347150","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347150","url":null,"abstract":"Performance modeling and optimization for on-chip interconnects in DRAM arrays are presented at various technology generations. Multiple interconnect design schemes and novel interconnect technology options are investigated to minimize the overall delay and energy-delay product.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132470001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
MOS models for LIM transient simulations 用于瞬态仿真的MOS模型
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-12-07 DOI: 10.1109/EPEPS.2015.7347159
Maryam Hajimiri, J. Schutt-Ainé
{"title":"MOS models for LIM transient simulations","authors":"Maryam Hajimiri, J. Schutt-Ainé","doi":"10.1109/EPEPS.2015.7347159","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347159","url":null,"abstract":"This paper presents an approach for the transient simulation of circuits through the latency insertion model using advanced models for MOS transistors. By taking into account the dynamic charge storage effects in short-channel devices a more accurate simulation of high-speed digital and analog circuits via the latency insertion method can be performed. The approach makes use of the SPICE LEVEL 3 transistor model for MOSFETs. In addition the use of the latency insertion method allows better convergence and higher computational speed for the simulation. Several computer simulations are performed to validate the method. Results show improvement in accuracy by using the high-level models.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126745057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A novel 3-D printed loop antenna using flexible NinjaFlex material for wearable and IoT applications 一种新型的3d打印环形天线，使用灵活的NinjaFlex材料，用于可穿戴设备和物联网应用
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347155
Kunal Nate, M. Tentzeris
{"title":"A novel 3-D printed loop antenna using flexible NinjaFlex material for wearable and IoT applications","authors":"Kunal Nate, M. Tentzeris","doi":"10.1109/EPEPS.2015.7347155","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347155","url":null,"abstract":"A stretchable, flexible loop antenna working at 2.4GHz ISM band was fabricated by the additive manufacturing (AM) 3-D printing technology. NinjaFlex, a flexible 3-D printable material was utilized for the first time as a 3-D hemi-sphere substrate for the loop antenna. A 3-D printer based on the Fused Diffusion Modelling (FDM) technology was employed to 3-D print the substrate material. The resonance frequency of the antenna shifts in response to the applied force which makes the configuration suitable for the wireless strain sensing application. The proposed antenna was designed for wearable electronics application such as health monitoring earrings. Hence it was designed in such a way that it maintains the Specific Absorption Rate (SAR) of the human head tissues within the assigned standard limits when placed near human replicating head. The proposed antenna system could be useful in the additively manufactured wearable packaging and IoT applications.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"395 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115312064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Evaluation of near-singular integrals for quadrilateral basis in integral equation solver 积分方程求解器中四边形基近奇异积分的求值
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347126
C. Luo, Giacomo Bianconi, Swagato Chakraborty
{"title":"Evaluation of near-singular integrals for quadrilateral basis in integral equation solver","authors":"C. Luo, Giacomo Bianconi, Swagato Chakraborty","doi":"10.1109/EPEPS.2015.7347126","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347126","url":null,"abstract":"The paper presents an efficient and accurate methodology for evaluating near singular Green's function integrals for 3D boundary element-based full-wave analysis of interconnect structures in IC packages and printed circuit boards using quadrilateral basis function.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132680053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Voltage and time margin analysis for wireline links in high dimensional design spaces 高维设计空间中电缆链路的电压和时间裕度分析
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347160
Arash Zargaran-Yazd, John Yan
{"title":"Voltage and time margin analysis for wireline links in high dimensional design spaces","authors":"Arash Zargaran-Yazd, John Yan","doi":"10.1109/EPEPS.2015.7347160","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347160","url":null,"abstract":"Evaluating the time and voltage margin (vtMargin) of a wireline link across all possible corner cases is deemed unfeasible using time-domain methods. Statistical methods provide estimates at a fraction of time, at the potential cost of accuracy and neglecting the nonlinear behaviors of various link elements. We present a methodology to calculate the vtMargin of memory and serial links in a time-efficient manner while considering nonlinear behaviors of active blocks. Using a small initial dataset, regression analysis is performed to find multi-variable multi-order equations, which are then exhaustively evaluated across all possible combinations of corner cases to find a more comprehensive histogram representing the margin spread in the link.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132681026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Accurate statistical analysis of high-speed links with PAM-4 modulation 准确的统计分析高速链路与PAM-4调制
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347161
V. Dmitriev-Zdorov
{"title":"Accurate statistical analysis of high-speed links with PAM-4 modulation","authors":"V. Dmitriev-Zdorov","doi":"10.1109/EPEPS.2015.7347161","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347161","url":null,"abstract":"Do statistical methods developed for NRZ signals work for PAM-4 modulation? Not entirely. We show that some basic principles (e.g., edge-based analysis, conversion of jitter PDF into vertical noise) remain valid, but the solution flow should be modified. Modifications include: the number of PMF accumulators, their initialization and input-output connections, weight factors, transition probabilities, and their relationships to the high-order correlation coefficients.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123163971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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