亚毫米波倒装芯片互连组装的工艺稳健性和可重复性

2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-12-07 DOI:10.1109/EPEPS.2015.7347148

S. Monayakul, S. Sinha, F. Schmuckle, M. Hrobak, D. Stoppel, O. Kruger, B. Janke, N. Weimann

{"title":"亚毫米波倒装芯片互连组装的工艺稳健性和可重复性","authors":"S. Monayakul, S. Sinha, F. Schmuckle, M. Hrobak, D. Stoppel, O. Kruger, B. Janke, N. Weimann","doi":"10.1109/EPEPS.2015.7347148","DOIUrl":null,"url":null,"abstract":"The design margins for sub-mm-wave flip-chip transitions in three different topologies, coplanar-to-coplanar, stripline-to-coplanar, and stripline-to-stripline, were verified with the realization and S-parameter measurement of passive chip assemblies, which contain the same wiring architecture as our InP DHBT circuit integration. High yield was observed, and less than 2 dB insertion loss per transition was measured above 300 GHz on the stripline-to-stripline design.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Process robustness and reproducibility of sub-mm wave flip-chip interconnect assembly\",\"authors\":\"S. Monayakul, S. Sinha, F. Schmuckle, M. Hrobak, D. Stoppel, O. Kruger, B. Janke, N. Weimann\",\"doi\":\"10.1109/EPEPS.2015.7347148\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design margins for sub-mm-wave flip-chip transitions in three different topologies, coplanar-to-coplanar, stripline-to-coplanar, and stripline-to-stripline, were verified with the realization and S-parameter measurement of passive chip assemblies, which contain the same wiring architecture as our InP DHBT circuit integration. High yield was observed, and less than 2 dB insertion loss per transition was measured above 300 GHz on the stripline-to-stripline design.\",\"PeriodicalId\":130864,\"journal\":{\"name\":\"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)\",\"volume\":\"124 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-12-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEPS.2015.7347148\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2015.7347148","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 4

摘要

通过无源芯片组件的实现和s参数测量，验证了共面到共面、带状线到共面和带状线到带状线三种不同拓扑下亚毫米波倒装芯片转换的设计余量，这些芯片组件包含与我们的InP DHBT电路集成相同的布线架构。在带状线对带状线设计上，观察到高良率，并且在300 GHz以上测量到每次转换的插入损耗小于2 dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Process robustness and reproducibility of sub-mm wave flip-chip interconnect assembly

The design margins for sub-mm-wave flip-chip transitions in three different topologies, coplanar-to-coplanar, stripline-to-coplanar, and stripline-to-stripline, were verified with the realization and S-parameter measurement of passive chip assemblies, which contain the same wiring architecture as our InP DHBT circuit integration. High yield was observed, and less than 2 dB insertion loss per transition was measured above 300 GHz on the stripline-to-stripline design.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)

自引率

0.00%

发文量