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2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)最新文献

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Fast singular-value decomposition of Loewner matrices for state-space macromodeling 状态空间宏建模中Loewner矩阵的快速奇异值分解
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347156
A. Hochman
{"title":"Fast singular-value decomposition of Loewner matrices for state-space macromodeling","authors":"A. Hochman","doi":"10.1109/EPEPS.2015.7347156","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347156","url":null,"abstract":"Computation of a singular-value decomposition (SVD) of a Loewner matrix is an essential step in several frequency-domain macromodeling algorithms. When the data set is large, the computational cost of this step is prohibitive. We describe a fast algorithm that avoids explicitly forming the Loewner matrix. Instead, it exploits the matrix's structure and rapid decay of singular values in typical applications to compute only the dominant singular values and corresponding singular vectors. A robust stopping criterion ensures accurate results up to a given tolerance. Computation times of less than two minutes are reported for matrices with as many as 105 rows and columns.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"159 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133515450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Novel time domain integral equation method hybridized with the macromodels of circuits 结合电路宏观模型的时域积分方程方法
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347147
H. Zhang, H. Yao, L. J. Jiang
{"title":"Novel time domain integral equation method hybridized with the macromodels of circuits","authors":"H. Zhang, H. Yao, L. J. Jiang","doi":"10.1109/EPEPS.2015.7347147","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347147","url":null,"abstract":"This work presents a novel transient field-circuit simulation method based on the time-domain integral equation (TDIE) and circuit macromodels. The traditional field-circuit simulation method constructs the Kirchoff's equations for lumped circuits with SPICE models, but they cannot handle problems with unknown circuit structures. The proposed method creates parametric macromodels to represent the port constitutive relations of the unknown circuits. Then the obtained macromodel is coupled with TDIE to enable the transient field-circuit cosimulation. Numerical examples are given to demonstrate the validity of the proposed method. The proposed method is targeted to solve unknown I/O modeling issues in general signal integrity problems.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115134938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Reduction of PDN induced coupling into signal lines using PTL power distribution 利用PTL功率分配减少PDN诱导耦合到信号线
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347143
David C. Zhang, M. Swaminathan, D. Keezer
{"title":"Reduction of PDN induced coupling into signal lines using PTL power distribution","authors":"David C. Zhang, M. Swaminathan, D. Keezer","doi":"10.1109/EPEPS.2015.7347143","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347143","url":null,"abstract":"Transmission lines carrying high speed I/O signals can couple significant amount of electromagnetic energy to power distribution network (PDN) which can then adversely affect signal and power integrity of the entire electrical system. Similarly the reverse is also true. In this paper we present three printed circuit board designs with different power distribution topologies and show through measurement that a previously proposed PDN design based on Power Transmission Line (PTL) concept is less susceptible to coupling from signal lines.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114256383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Numerical modeling of electromgantic interference (EMI) and radiation problems for large multiscale structures 大型多尺度结构电磁干扰与辐射问题的数值模拟
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347139
M. Fallahpour, Maokun-Li, M. Tong, W. Chew
{"title":"Numerical modeling of electromgantic interference (EMI) and radiation problems for large multiscale structures","authors":"M. Fallahpour, Maokun-Li, M. Tong, W. Chew","doi":"10.1109/EPEPS.2015.7347139","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347139","url":null,"abstract":"The large multiscale problems are commonly faced in real-world applications such as analysis of electromagnetic interference for a printed circuit board installed on a large platform with connected cables and wires. Unfortunately, modeling the multiscale structures is the bottleneck of electromagnetic numerical solvers. This stems from the fact that to capture objects with different scales, disparate and nonuniform meshing is unavoidable. This disparate meshing leads into different physics coexistence and consequently results in slow convergence of iterative solvers. To remedy this problem, in here, we suggest using equivalence principle algorithm which is an efficient domain decomposition method to model electromagnetic interference/radiation in the large multiscale problems.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121304588","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Trace mis-registration margin on PCB how much is enough? 在PCB上跟踪错配余量多少才够?
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347154
Cong Gao, Pravin Patel
{"title":"Trace mis-registration margin on PCB how much is enough?","authors":"Cong Gao, Pravin Patel","doi":"10.1109/EPEPS.2015.7347154","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347154","url":null,"abstract":"For high speed interconnect design, trace crosstalk due to trace mis-registration can be as high as connector and vias. One should make sure such crosstalk is well managed. This paper presents the parametric study on trace crosstalk with respect to the mis-registration margin and provides some guidelines in practical system designs.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"160 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123407295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of on-chip linear voltage regulator module and measurement of power distribution network noise fluctuation at high-speed output buffer 片上线性稳压模块的设计及高速输出缓冲器配电网噪声波动的测量
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EDAPS.2016.7874396
Manho Lee, Heegon Kim, Sukjin Kim, Joungho Kim, Jonghyun Cho, C. Yoon, B. Achkir, Jingook Kim, J. Fan
{"title":"Design of on-chip linear voltage regulator module and measurement of power distribution network noise fluctuation at high-speed output buffer","authors":"Manho Lee, Heegon Kim, Sukjin Kim, Joungho Kim, Jonghyun Cho, C. Yoon, B. Achkir, Jingook Kim, J. Fan","doi":"10.1109/EDAPS.2016.7874396","DOIUrl":"https://doi.org/10.1109/EDAPS.2016.7874396","url":null,"abstract":"By applying on-chip linear VRM, PDN inductance is greatly decreased and PDN resonance peak disappears, which is usually generated by PCB/PKG inductance and on-chip capacitance. To confirm, we design an application circuits which have on-chip linear voltage regulator module (VRM) with aggressor and victim buffer. We validate the advantages of on-chip linear VRM by measuring fabricated chip in this research. Moreover, we show PDN self-impedance at output buffer by simulation with designed PCB's S-parameter, and eye-diagram power fluctuation up to 1 Gbps.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128441123","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Delay estimation using SVD-based causal fourier continuations for high speed interconnects 基于svd的高速互连因果傅里叶延拓延迟估计
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347167
L. Barannyk, H. Tran, Linh Nguyen, A. Elshabini, F. Barlow
{"title":"Delay estimation using SVD-based causal fourier continuations for high speed interconnects","authors":"L. Barannyk, H. Tran, Linh Nguyen, A. Elshabini, F. Barlow","doi":"10.1109/EPEPS.2015.7347167","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347167","url":null,"abstract":"We propose a new method for time delay extraction in the frequency domain. It is based on the spectrally accurate method for causality characterization that employs singular value decomposition (SVD) based Fourier continuations, which was recently developed by the authors. The time delay estimation approach is constructed by incorporating a linearly varying phase factor. Several analytic and simulated examples are used to demonstrate performance of the proposed technique.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117142359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
36-GHz-bandwidth quad-channel driver module using compact QFN package for optical coherent systems 采用紧凑型QFN封装的36ghz带宽四通道驱动模块，用于光学相干系统
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347164
H. Wakita, M. Nagatani, H. Nosaka
{"title":"36-GHz-bandwidth quad-channel driver module using compact QFN package for optical coherent systems","authors":"H. Wakita, M. Nagatani, H. Nosaka","doi":"10.1109/EPEPS.2015.7347164","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347164","url":null,"abstract":"This paper presents a small quad-channel driver module for optical modulators in digital coherent systems. To decrease the size of the module, we designed a compact quad-channel package. The size of the package is 14 × 8 × 2.8 mm3. The bandwidth of the driver module is 36 GHz with maximum differential gain of 15 dB. Waveforms with clear eye-openings at symbol rates of 32 and 50 Gbaud were observed. To the best of our knowledge, this is the most compact quad-channel driver module in 50-Gbaud class.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123103617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Global sensitivity based dimension reduction for fast variability analysis of nonlinear circuits 基于全局灵敏度的非线性电路降维快速变异性分析
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347138
A. Prasad, Sourajeet Roy
{"title":"Global sensitivity based dimension reduction for fast variability analysis of nonlinear circuits","authors":"A. Prasad, Sourajeet Roy","doi":"10.1109/EPEPS.2015.7347138","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347138","url":null,"abstract":"In this paper, a dimension reduction methodology for expedited polynomial chaos (PC) based variability analysis of nonlinear circuits is presented. The key feature of this work is the development of an efficient global sensitivity approach to quantify the relative impact of each random dimension on the variance of the circuit outputs. This global sensitivity measure is then used to guide the truncation of the original high-dimensional random space into a reduced dimensional random subspace. Performing the PC expansion of the circuit model on this reduced dimensional subspace leads to far faster variability analysis with only marginal loss of accuracy.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131257773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Modeling of Power Distribution Networks for path finding 配电网寻路建模
2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI: 10.1109/EPEPS.2015.7347119
K. Han, Srikumar Sandeep, Bill Martin, M. Swaminathan
{"title":"Modeling of Power Distribution Networks for path finding","authors":"K. Han, Srikumar Sandeep, Bill Martin, M. Swaminathan","doi":"10.1109/EPEPS.2015.7347119","DOIUrl":"https://doi.org/10.1109/EPEPS.2015.7347119","url":null,"abstract":"In this paper an algorithm is described for obtaining the response of Power Distribution Networks (PDN) arising in chip, package or pcb during an early design phase. Results are provided for power grids arising in silicon interposers to validate the approach.","PeriodicalId":130864,"journal":{"name":"2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124140581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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