Modeling of Power Distribution Networks for path finding

2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2015-10-01 DOI:10.1109/EPEPS.2015.7347119

K. Han, Srikumar Sandeep, Bill Martin, M. Swaminathan

引用次数: 1

Abstract

In this paper an algorithm is described for obtaining the response of Power Distribution Networks (PDN) arising in chip, package or pcb during an early design phase. Results are provided for power grids arising in silicon interposers to validate the approach.

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配电网寻路建模

本文描述了一种在芯片、封装或pcb板设计初期获取配电网络(PDN)响应的算法。给出了在硅中间体中产生的电网的结果来验证该方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2015 IEEE 24th Electrical Performance of Electronic Packaging and Systems (EPEPS)

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