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[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium最新文献

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Closing the engineering to manufacturing information loop 闭合工程与制造的信息循环
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279802
B. Mackowiak, S. Reeser
{"title":"Closing the engineering to manufacturing information loop","authors":"B. Mackowiak, S. Reeser","doi":"10.1109/IEMT.1991.279802","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279802","url":null,"abstract":"It is pointed out that, as printed circuit boards (PCBs) grow more complex and development time shrinks, the need for accurate and timely transfer of information from engineering to manufacturing has increased. This increased need has forced manufacturing to define information requirements, standardize data, improve data transfer capabilities, and verify engineering information. NCR E&M Columbia has overcome many of the problems associated with the timely delivery of accurate information with the Manufacturing Interface File (MIF) system. The MIF system enables manufacturing to quickly and accurately react to engineering requirements. It has become an essential component in the product development cycle. The authors detail all components of the MIF system and describe how it enables E&M Columbia to successfully close the information loop between engineering and manufacturing.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125921418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Criticality of die placement on wire bonding 焊丝键合模具放置的临界性
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279749
G. Michaud
{"title":"Criticality of die placement on wire bonding","authors":"G. Michaud","doi":"10.1109/IEMT.1991.279749","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279749","url":null,"abstract":"It is pointed out that wire bonder suppliers are keeping up with the demands for six-sigma quality levels by opening up process windows and minimizing sensitivity of the equipment to set up and material variations. Die bonder suppliers are challenged even more. Their process windows are in fact becoming tighter. Fine-pitch, large I/O packages have put greater constraints on die positioning within these packages. The author reviews the issues driving this constraint and discusses ways in which packaging designers can relax placement accuracy requirements and how assembly process engineers can accommodate die placement error in these packages. It is noted that not only are there die placement-tolerant designs available, but also wire bonding processes which can accommodate or compensate for nominal 3-sigma placement error in current generation die bonding equipment without device or package design changes.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115295119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Advantages of process modeling as a key manufacturing tool to improve process efficiency and reduce costs 过程建模作为提高过程效率和降低成本的关键制造工具的优势
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279756
J.C. Adzima, S. Elazar, W.D. Ketchie, W.J. Riordan, R.P. Anjard
{"title":"Advantages of process modeling as a key manufacturing tool to improve process efficiency and reduce costs","authors":"J.C. Adzima, S. Elazar, W.D. Ketchie, W.J. Riordan, R.P. Anjard","doi":"10.1109/IEMT.1991.279756","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279756","url":null,"abstract":"The authors describe the utilization of simulation techniques to achieve significant manufacturing improvements for a typical DoD circuit card manufacturing facility. Although the information presented describes the process flow of printed wire boards through the manufacturing cycle it can be used for improving any process-oriented system. Also included is information on selecting the proper hardware and software for various environments, data requirements, locating and processing this data, setting up and manipulating the various simulation parameters, type of output, proper output analysis, applications to other situations, validation techniques, and actual results showing a 90% reduction of work in process and a 83% reduction in cycle time. The authors describe in detail the approach to use for implementation in any aerospace environment or similar business dealing with small demand requirements of a high product mix.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131759460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Process based cost modeling 基于流程的成本建模
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279825
C. Bloch, R. Ranganthan
{"title":"Process based cost modeling","authors":"C. Bloch, R. Ranganthan","doi":"10.1109/IEMT.1991.279825","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279825","url":null,"abstract":"Presents a method of performing the cost analysis by taking into account the process yield at each step of the process sequence and how the yield at different steps impacts the overall cost of the module. A statistical model of the material process flow is used to estimate assembly costs. The stochastic process models are represented by finite state automata. The material flow modeled represents the hierarchy of material classes (leads, components, and modules). Formal methods to represent the likelihood of a process step and the conversions between the hierarchy of classes are defined. The model is illustrated by examples.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"23 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132584341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
In-situ film thickness measurements by using pyrometric interferometry 用热测量干涉法原位测量薄膜厚度
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279776
F. Boebel, F. Gesellschaft, U. Bonnes, K.P. Frohmader
{"title":"In-situ film thickness measurements by using pyrometric interferometry","authors":"F. Boebel, F. Gesellschaft, U. Bonnes, K.P. Frohmader","doi":"10.1109/IEMT.1991.279776","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279776","url":null,"abstract":"A novel optical in situ method for film thickness measurements, pyrometric interferometry (PI), is introduced, which is capable of high-resolution (0.5 nm) data acquisition during the process (in situ measurement) and real-time data evaluation. It can be used for process control as well as for online quality inspection without time delay or additional handling mechanisms and is suitable for monitoring single films as well as multilayer structures. PI is insensitive to mechanical vibrations and hostile environments such as high temperature and/or chemical reactive gases. Its technical realization is achieved by using standard components, thus providing a very competitive cost-effectiveness ratio. In situ PI film thickness measurements on a SiO/sub 2/ layer growing on a silicon substrate by thermal oxidation are presented, as well as on a SiO/sub 2//Si coating by CVD (chemical vapor deposition). The potential technical impact of PI on automation, reliability, and long-term performance of manufacturing operations is also discussed.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133240018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Hermetic plastic packages with applications to ruggedized boards 密封塑料包装，适用于加固板
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279814
C. Val, M. Leroy, J. Chambre, D. Bourret, R. Sempéré, A. Doucoure
{"title":"Hermetic plastic packages with applications to ruggedized boards","authors":"C. Val, M. Leroy, J. Chambre, D. Bourret, R. Sempéré, A. Doucoure","doi":"10.1109/IEMT.1991.279814","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279814","url":null,"abstract":"The feasibility of organic and inorganic deposition providing hermetic circuit boards has been demonstrated . The diffusion barrier is set up by depositing under plasma an inorganic layer instead of an organic layer. SiO/sub 2/ was chosen because it is easy to deposit and its properties are well-known. Three layers are necessary: conventional varnish (epoxy or acrylic) as a leveling-off agent, SiO/sub 2/ as a diffusion barrier, and parylene deposited under vacuum as a mechanical protective coating for the SiO/sub 2/. The board's hermetic protection is thus deposited in situ and is not obtained by means of a hermetic packaging.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134065022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A software tool for technology tradeoff evaluation in multichip packaging 多芯片封装技术权衡评估的软件工具
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279809
P. Sandborn
{"title":"A software tool for technology tradeoff evaluation in multichip packaging","authors":"P. Sandborn","doi":"10.1109/IEMT.1991.279809","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279809","url":null,"abstract":"A software tool for evaluating performance tradeoffs in multichip packaging is described. The tool enhances the manufacturability and decreases the design risk associated with the selection of packaging technologies for integrated circuits. Geometric, electrical, thermal, and manufacturing metrics can be estimated using the tool. The tool allows technologies to be changed and design rules to be modified using a what if approach. The role of technology tradeoff analysis in multichip system design and system compiler concepts are discussed, and implementation details of the present tool are described. A design example of a RISC processor module is presented, and the use of the tool for assessing mixed technology systems is demonstrated.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124321807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Paperless assembly using touchscreen based graphics 无纸化组装使用基于触摸屏的图形
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279784
J. Hawley, B. Mackowiak
{"title":"Paperless assembly using touchscreen based graphics","authors":"J. Hawley, B. Mackowiak","doi":"10.1109/IEMT.1991.279784","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279784","url":null,"abstract":"An automated system has been implemented to develop and electronically distribute manufacturing process information. One component of this system focuses on replacing paper instructions and drawings in the hand assembly and manual inspection areas with a touchscreen-based graphical user interface (GUI). All information available in the system is automatically generated by process planners and maintained with minimum effort. On the production floor, the GUI uses a plantwide barcode system to provide automatic selection and display of assembly and inspection instructions. The GUI uses VGA graphics to display a board outline, color-coded text descriptions, and component outlines that distinguish between parts placed at the current workstation and all other parts on the assembly. The objective of the system is to provide accurate assembly information to the appropriate location in a timely manner. The overall, integrated system is expected to reduce process development time by 80%, improve hand assembly and manual inspection efficiency, and eliminate 90% of all assembly placement errors due to information problems.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125465671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Thermal design for high-speed, high-density multi-chip module 热设计为高速、高密度多芯片模块
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279792
T. Handa, S. Iida, J. Utsunomiya
{"title":"Thermal design for high-speed, high-density multi-chip module","authors":"T. Handa, S. Iida, J. Utsunomiya","doi":"10.1109/IEMT.1991.279792","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279792","url":null,"abstract":"Examines the boundary conditions of models for finite element analysis of the thermal design of high-speed, high-density multi-chip modules, principally the thermal via and heat sink, and investigates means of improving the accuracy of heat transfer analysis simulation. It is concluded that, in evaluating the effectiveness of thermal vias in heat loss, simulation can yield results close to observed values by considering the substrate a compound material with a uniform thermal and conductivity coefficient determined by the ratio of thermal via cross section area to substrate area. A thermal via area ratio of 10% is satisfactory both from the standpoint of manufacturing and for effectiveness in decreasing thermal resistance. Also, in the model considered the heat transfer coefficient of the heat sink can be determined by using their speeds and comparison with observed results.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134236642","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Quality Vision 2000 (quality management system) 质量愿景2000(质量管理体系)
[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium Pub Date : 1991-09-16 DOI: 10.1109/IEMT.1991.279820
S. Rabe, J. Mann
{"title":"Quality Vision 2000 (quality management system)","authors":"S. Rabe, J. Mann","doi":"10.1109/IEMT.1991.279820","DOIUrl":"https://doi.org/10.1109/IEMT.1991.279820","url":null,"abstract":"The authors describe Quality Vision 2000, a package of management systems improvements intended to build to total quality environment. They discuss quality elements and systems used during the 1970s and 1980s, and the results achieved. These include PPM, statistical process control, Cpk, designed experiments, and quality circles. It is noted that involvement with customers including technical seminars, design reviews, Beta sight testing, surveys, and overall perception will be a key to meeting the objectives of Quality Vision 2000. During the 1990s existing elements will be strengthened and new elements will be added to meet the objective of total customer satisfaction. Key elements, methods, and measurements for Quality Vision 2000 are presented.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132475962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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