{"title":"高度可制造的多层陶瓷表面安装封装","authors":"F.F. Cappo, J. Milliken, J. Mosley","doi":"10.1109/IEMT.1991.279830","DOIUrl":null,"url":null,"abstract":"A surface mount package was designed in 1983 to satisfy a multi-chip cost-performance market requirement where a large number of components can be replaced with a few integrated devices in a single package. It was decided to use the IBM multi-layer ceramic (MLC) technology for the carrier substrate because of proven reliability, volume manufacturing capacity, multi-chip capability, wiring flexibility, and performance. Second, it was decided to use a specially designed surface-mount technology (SMT) interconnection to the card instead of the industry standard SMT or pin in hole because of I/O density, cost, and performance. The SMT interconnection was refined through theoretical and empirical investigation along with the low cost, high manufacturability requirement. The result was a high melting point Sn/Pb ball placed in a 0.50\" grid array attached to the substrate and card using eutectic solder. Design concepts to aid in manufacturing are discussed together with the manufacturing/process design, and a typical example of this packaging technology is presented.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Highly manufacturable multi-layered ceramic surface mounted package\",\"authors\":\"F.F. Cappo, J. Milliken, J. Mosley\",\"doi\":\"10.1109/IEMT.1991.279830\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A surface mount package was designed in 1983 to satisfy a multi-chip cost-performance market requirement where a large number of components can be replaced with a few integrated devices in a single package. It was decided to use the IBM multi-layer ceramic (MLC) technology for the carrier substrate because of proven reliability, volume manufacturing capacity, multi-chip capability, wiring flexibility, and performance. Second, it was decided to use a specially designed surface-mount technology (SMT) interconnection to the card instead of the industry standard SMT or pin in hole because of I/O density, cost, and performance. The SMT interconnection was refined through theoretical and empirical investigation along with the low cost, high manufacturability requirement. The result was a high melting point Sn/Pb ball placed in a 0.50\\\" grid array attached to the substrate and card using eutectic solder. Design concepts to aid in manufacturing are discussed together with the manufacturing/process design, and a typical example of this packaging technology is presented.<<ETX>>\",\"PeriodicalId\":127257,\"journal\":{\"name\":\"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-09-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1991.279830\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1991.279830","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A surface mount package was designed in 1983 to satisfy a multi-chip cost-performance market requirement where a large number of components can be replaced with a few integrated devices in a single package. It was decided to use the IBM multi-layer ceramic (MLC) technology for the carrier substrate because of proven reliability, volume manufacturing capacity, multi-chip capability, wiring flexibility, and performance. Second, it was decided to use a specially designed surface-mount technology (SMT) interconnection to the card instead of the industry standard SMT or pin in hole because of I/O density, cost, and performance. The SMT interconnection was refined through theoretical and empirical investigation along with the low cost, high manufacturability requirement. The result was a high melting point Sn/Pb ball placed in a 0.50" grid array attached to the substrate and card using eutectic solder. Design concepts to aid in manufacturing are discussed together with the manufacturing/process design, and a typical example of this packaging technology is presented.<>
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