{"title":"激光创造了硅孔,用于在mcm中堆叠模具","authors":"R. Lee, D. Whittaker","doi":"10.1109/IEMT.1991.279791","DOIUrl":null,"url":null,"abstract":"The stacking of silicon devices is gaining some interest as it will allow even greater densities over current multichip module (MCM) approaches. One type of approach being tried in the industry is interconnecting stacked dies by routing their metal lines to the edge of the die and then strapping the appropriate lines from each die together. An approach being pursued by the Center for Microelectronics Research (CMR) at the University of South Florida is the creation of silicon interconnect vias for communication through the active chip or wafer. Vias of 1 to 2 mil diameters have been successfully created by laser ablation of silicon. Studies are currently in progress to determine the effect such via creation has on nearby active devices. A test vehicle containing transistors and capacitors of various geometries is being employed for the purpose of measuring any detriment that the laser drilling has when vias are created. Data are presented on whether any changes have been measured in various parameters, such as subthreshold voltages and current leakage. Scanning electron micrographs are shown, and progress to date on the methodology employed for metallizing the side walls of the vias is discussed.<<ETX>>","PeriodicalId":127257,"journal":{"name":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Laser created silicon vias for stacking dies in MCMs\",\"authors\":\"R. Lee, D. Whittaker\",\"doi\":\"10.1109/IEMT.1991.279791\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The stacking of silicon devices is gaining some interest as it will allow even greater densities over current multichip module (MCM) approaches. One type of approach being tried in the industry is interconnecting stacked dies by routing their metal lines to the edge of the die and then strapping the appropriate lines from each die together. An approach being pursued by the Center for Microelectronics Research (CMR) at the University of South Florida is the creation of silicon interconnect vias for communication through the active chip or wafer. Vias of 1 to 2 mil diameters have been successfully created by laser ablation of silicon. Studies are currently in progress to determine the effect such via creation has on nearby active devices. A test vehicle containing transistors and capacitors of various geometries is being employed for the purpose of measuring any detriment that the laser drilling has when vias are created. Data are presented on whether any changes have been measured in various parameters, such as subthreshold voltages and current leakage. Scanning electron micrographs are shown, and progress to date on the methodology employed for metallizing the side walls of the vias is discussed.<<ETX>>\",\"PeriodicalId\":127257,\"journal\":{\"name\":\"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-09-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1991.279791\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] Eleventh IEEE/CHMT International Electronics Manufacturing Technology Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1991.279791","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Laser created silicon vias for stacking dies in MCMs
The stacking of silicon devices is gaining some interest as it will allow even greater densities over current multichip module (MCM) approaches. One type of approach being tried in the industry is interconnecting stacked dies by routing their metal lines to the edge of the die and then strapping the appropriate lines from each die together. An approach being pursued by the Center for Microelectronics Research (CMR) at the University of South Florida is the creation of silicon interconnect vias for communication through the active chip or wafer. Vias of 1 to 2 mil diameters have been successfully created by laser ablation of silicon. Studies are currently in progress to determine the effect such via creation has on nearby active devices. A test vehicle containing transistors and capacitors of various geometries is being employed for the purpose of measuring any detriment that the laser drilling has when vias are created. Data are presented on whether any changes have been measured in various parameters, such as subthreshold voltages and current leakage. Scanning electron micrographs are shown, and progress to date on the methodology employed for metallizing the side walls of the vias is discussed.<>