Aymen Ben Hammadi, Mongia Mhiri, Sehmi Saad, K. Besbes
{"title":"A CMOS 2.4 GHz tunnable RF bandpass filter in 0.35μm technology","authors":"Aymen Ben Hammadi, Mongia Mhiri, Sehmi Saad, K. Besbes","doi":"10.1109/DTIS.2012.6232961","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232961","url":null,"abstract":"A tunable Q-enhanced bandpass filter is presented. The Q of the passive inductors that form the filter resonators is enhanced using a cross-coupled differential pair of transistors which is degenerated by a negative resistance. This technique allows compensation of frequency dependent inductor losses and ensures the Q-enhanced LC resonators to have frequency behaviour close perfectly ideal in the pass band of the filter. The filter centered at 2.4 GHz with a 31.5 MHz bandwidth is tunable in frequency by 3.75%, exhibits a -33 dBm for 1-dB compression point and a 16.64 dB noise figure while consuming 4 mW of power. The circuit was simulated in AMS 0.35 μm CMOS technology.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114509930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Wessely, Frank Wessely, Emrah Birinci, U. Schwalke, Bernadette Riedinger
{"title":"On/off-current ratios of transfer-free bilayer graphene FETs as a function of temperature","authors":"P. Wessely, Frank Wessely, Emrah Birinci, U. Schwalke, Bernadette Riedinger","doi":"10.1109/DTIS.2012.6232950","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232950","url":null,"abstract":"In this paper we report on a novel method to fabricate graphene transistors directly on oxidized silicon wafers without the need to transfer graphene. By means of catalytic chemical vapor deposition (CCVD) the in-situ grown bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate. These BiLGFETs possess unipolar p-type device characteristics with an extremely high on/off-current ratio between 1×106 and 1×107 at room temperature [1, 2], exceeding previously reported values by several orders of magnitude. Furthermore, when increasing the ambient temperature to 200°C, the on/off-current ratio only degrades by one order of magnitude for BiLGFETs. Besides the excellent device characteristics, the complete CCVD fabrication process is silicon CMOS compatible. This will allow a simple and low-cost integration of graphene devices for nanoelectronic applications in a hybrid silicon CMOS environment.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126351065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of a zero crossing BFSK demodulator for a wireless sensor","authors":"Amel Neifar, H. Trabelsi, G. Bouzid, M. Masmoudi","doi":"10.1109/DTIS.2012.6232953","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232953","url":null,"abstract":"In this paper, a transistor-level simulation result of a Zero crossing BFSK demodulator is presented. The detector will be integrated into a frequency-hopped spread spectrum receiver operating in the 863-870 MHz ISM band, using the zigbee protocol (IEEE 802.15.4). This end to demodulate a received bit sequence with a bit rate equal to 20 kbps using 0.35 μm CMOS technology and a 3 V power supply. The proposed demodulator dedicated to an application of low power and low cost can maintain good performance under process variation. The BER results show that the proposed demodulator needs only 10.9 dB input signal_to_noise ratio to achieve a BER of 10-3 as specified in zigbee standard.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122757034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel design of two-stage CMOS amplifier used for εΔ analog to digital converter","authors":"Radwene Laajimi, N. Gueddah, M. Masmoudi","doi":"10.1109/DTIS.2012.6232946","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232946","url":null,"abstract":"Operational transconductance amplifier (OTA) is one of the most significant building-blocks in integrated discret-time filters used in analog to digital converter (ADC) for Sigma-delta converter. In this paper we designed a novel structure of two-stage CMOS amplifier in AMS 0.35μm technology. Simulation results confirm the proposed OTA circuit. In fact, we achieved a gain band width (GBW) equal to 80MHz, Cut-off frequency (fb) of 95 KHz and 60 dB gain (Av). In addition our new circuit allowed us to reduce settling time (St) to 30 ns and a slew rate (SR) of 50 ν/μs at ±1.5V supply voltage. Eventually we have also succeeded in reducing the static power consumption to 0.36 mW.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123163378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Behavior control of a mobile robot based on Fuzzy logic and Neuro Fuzzy approaches for monitoring wall","authors":"Hanene Rouabah, C. Abdelmoula, M. Masmoudi","doi":"10.1109/DTIS.2012.6232944","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232944","url":null,"abstract":"This work describes the design and development of controllers based on artificial intelligence tried on a newly design of a mobile robot type-vehicle to control behavior for monitoring wall. Two approaches have been optimized and developed to control the robot: The first one is based on Fuzzy logic. This control algorithm combines the different sensory information and provides a suitable control command allowing the mobile robot to follow the wall deviations. The second approach consists of applying a hybrid-type Neuro-Fuzzy ANFIS controller for the same task. This controller combines the advantages of Fuzzy logic and Neural Networks. Simulations results are presented and implemented with VHDL using ANFIS architecture.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134312161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Dopant-free CMOS: A new device concept","authors":"Frank Wessely, Tillmann A. Krauss, U. Schwalke","doi":"10.1109/DTIS.2012.6232949","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232949","url":null,"abstract":"In this paper we report on a newly developed multigate nanowire (NW) based field-effect device (NWFET) where the transistor type is freely selectable by the application of a control-voltage, adding to design flexibility in integrated circuit fabrication. Moreover, the midgap Schottky-barrier source and drain contacts of the NWFET make it feasible for the usa in high temperature environments, since the devices posses both stability against high temperatures and low OFF-state current at the same time. This makes the presented NWFET a multi-purpose device for many specific circuit applications.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133076972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sehmi Saad, Mongia Mhiri, Aymen Ben Hammadi, K. Besbes
{"title":"A CMOS 0.35-μm, 3.3-V PLL synthesizer for Bluetooth transmitter","authors":"Sehmi Saad, Mongia Mhiri, Aymen Ben Hammadi, K. Besbes","doi":"10.1109/DTIS.2012.6232954","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232954","url":null,"abstract":"A CMOS phase-locked loop (PLL) which synthesizes frequencies between 2.4 and 2.479 GHz with 1-MHz channel spacing and settles in approximately 100 μs is presented. The highlights of the topology are an N integer PLL architecture that operates with 1-MHz reference frequency and a passive discrete-time loop filter. The output signal is generated by a simple cross-coupled LC VCO and divided by a programmable frequency divider. The proposed PLL is designed to be employed as a synthesizer for Bluetooth transmitter in a low-cost CMOS technology. Simulated in 0.35-μm CMOS process, the PLL consumes 9.87 mA from a 3.3 V supply and achieves phase noise of -128.68 dBc/Hz at 3 MHz offset and spurs of -67 dBc at 3 MHz.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129146760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Mezghani, F. Tounsi, M. Masmoudi, A. Rekik, F. Mailly, P. Nouet
{"title":"Efficiency modeling of a CMOS MEMS convective accelerometer","authors":"B. Mezghani, F. Tounsi, M. Masmoudi, A. Rekik, F. Mailly, P. Nouet","doi":"10.1109/DTIS.2012.6232985","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232985","url":null,"abstract":"This paper reports efficiency modeling using 3D FEM simulation of a convective accelerometer obtained by FSBM of a die fabricated using standard CMOS technology. In such sensors, best sensitivity is obtained by placing temperature detectors where air temperature is the most sensitive to acceleration. This will obviously depends on 3D effects. In a previous work, a behavioral model of the sensor including only 2D effects was developed. This work investigates 3D effects which give the opportunity to better predict not only sensor sensitivity but also power dissipation. Experimental sensitivity values and 3D FEM ones are verified for two different sensors and two different heater temperatures. For a prototype having a heater-cavity border distance of 340μm and a heater length of 230μm, maximum sensitivity point is obtained for detectors localized at a distance of 125μm from heater center. Using this 3D geometry in FEM simulations, we show that electrical power decreases more rapidly than sensitivity when heater length is reduced. Moreover, when detectors are shortened, the sensitivity will be quite higher with an optimal value obtained for a detector implemented on one third of the side bridge.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117058952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
U. Schwalke, P. Wessely, Frank Wessely, Martin Keyn, L. Rispal
{"title":"Nanoelectronics: From silicon to graphene","authors":"U. Schwalke, P. Wessely, Frank Wessely, Martin Keyn, L. Rispal","doi":"10.1109/DTIS.2012.6232951","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232951","url":null,"abstract":"In the future of nanoelectronics, the use of pure silicon based devices will not be possible anymore since the limit of silicon are already reached. Carbon seems to be a great alternative to build high performance electronic devices. Carbon nanotube field-effect transistors can be used as active device in integrated circuits, as memory cell in numerous applications. More recently, graphene-based transistors are emerging as another potential candidate to extend and eventually replace the traditional planar MOSFET.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122720011","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Trimeche Abdessalem, Boukid Nesrine, A. Sakly, A. Mtibaa
{"title":"Performance analysis of ZF and MMSE equalizers for MIMO systems","authors":"Trimeche Abdessalem, Boukid Nesrine, A. Sakly, A. Mtibaa","doi":"10.1109/DTIS.2012.6232979","DOIUrl":"https://doi.org/10.1109/DTIS.2012.6232979","url":null,"abstract":"This paper presents an in-depth analysis of the zero forcing (ZF) and minimum mean squared error (MMSE) equalizers applied to wireless multi-input multi-output (MIMO) systems with no fewer receive than transmit antennas. In spite of much prior work on this subject, we reveal several new and surprising analytical results in terms of output signal-to-noise ratio (SNR), by comparing the Bit Error Rate (BER) and the average detection time consuming. Simulation based on the platform of MATLAB. We discuss the case where there a multiple transmit antennas and multiple receive antennas resulting in the formation of a Multiple Input Multiple Output (MIMO) channel with Zero Forcing equalizer, MIMO with MMSE equalizer, MIMO with ZF Successive Interference Cancellation equalizer, MIMO with ML equalization, MIMO with MMSE SIC and optimal ordering.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131573108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}