{"title":"A novel design of two-stage CMOS amplifier used for εΔ analog to digital converter","authors":"Radwene Laajimi, N. Gueddah, M. Masmoudi","doi":"10.1109/DTIS.2012.6232946","DOIUrl":null,"url":null,"abstract":"Operational transconductance amplifier (OTA) is one of the most significant building-blocks in integrated discret-time filters used in analog to digital converter (ADC) for Sigma-delta converter. In this paper we designed a novel structure of two-stage CMOS amplifier in AMS 0.35μm technology. Simulation results confirm the proposed OTA circuit. In fact, we achieved a gain band width (GBW) equal to 80MHz, Cut-off frequency (fb) of 95 KHz and 60 dB gain (Av). In addition our new circuit allowed us to reduce settling time (St) to 30 ns and a slew rate (SR) of 50 ν/μs at ±1.5V supply voltage. Eventually we have also succeeded in reducing the static power consumption to 0.36 mW.","PeriodicalId":114829,"journal":{"name":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DTIS.2012.6232946","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Operational transconductance amplifier (OTA) is one of the most significant building-blocks in integrated discret-time filters used in analog to digital converter (ADC) for Sigma-delta converter. In this paper we designed a novel structure of two-stage CMOS amplifier in AMS 0.35μm technology. Simulation results confirm the proposed OTA circuit. In fact, we achieved a gain band width (GBW) equal to 80MHz, Cut-off frequency (fb) of 95 KHz and 60 dB gain (Av). In addition our new circuit allowed us to reduce settling time (St) to 30 ns and a slew rate (SR) of 50 ν/μs at ±1.5V supply voltage. Eventually we have also succeeded in reducing the static power consumption to 0.36 mW.