J. Nakata, T. Sogo, K. Yamanaka, T. Kameda, Y. Mihashi
{"title":"Thermosenstor — A new temperature-sensitive switching device","authors":"J. Nakata, T. Sogo, K. Yamanaka, T. Kameda, Y. Mihashi","doi":"10.1109/IEDM.1976.189037","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189037","url":null,"abstract":"A new type of temperature-sensitive switching device constructed with a p-n-p -n structure has been developed. This new device can be turned on by a predetermined temperature under the forward bias. This turn-on temperature can be shifted from 50°C to 150°C by connecting gate shunt resistance in parallel with emitter junction of the device. This device owes its features to the thyristor structure which gives contactless and latching switch, gate controlled operation and fast switching. However, several modifications have been made from conventional thyristor design in doping levels and dimensions for temperature-sensitive switching device. The structure, operation, characteristics the feature of the device are described.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121750051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance limitations and reliability of power devices: A thermal insight","authors":"A. Silard, M. Bodea","doi":"10.1109/IEDM.1976.189004","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189004","url":null,"abstract":"An investigation of the power performance limitations or power devices due to thermal failure has been performed under steady-state and transient conditions. The maximum thermal resistance Rθthat prevents thermal runaway under various blocking conditions was computed as a function of applied voltage VAand of leakage current Io. The dependences Rθ=f (VA,Io) were computed for the worst cases and their validity had been proved by experimental data on diodes, transistors and thyristors. The reliability and performance limitations of devices under transient conditions had been investigated for the most complex case, i.e. the transient thermal response of an amplifying gate thyristor (a.g.t.) during its firing. The analytical model and basic computer procedure are described in detail. A good agreement was found between computed values and experimental data for maximum temperature Tm.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122310074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High power dual mode coupled-cavity TWT","authors":"W. R. Ayers, G. Miram, J. Schriever, J. Ruetz","doi":"10.1109/IEDM.1976.189032","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189032","url":null,"abstract":"The purpose of this work was to develop a gridded, dual-mode amplifier TWT suitable for the output tube of a multimode airborne radar. The required 10:1 power ratio in the two modes was achieved in the tube design at the maximum drive available of 1 watt. The PPM-focused tube was designed with the use of a computer program which calculates gain, stability, and efficiency of coupled-cavity TWTs. The measured results from the tube agree very closely with the analysis and demonstrate the value of being able to accurately calculate coupled-cavity TWT performance. A comparison of the calculated and measured results for the dual-mode TWT is presented.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125020872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Measurement of minority-carrier lifetime and surface recombination velocity with a high spacial resolution","authors":"M. Watanabe, G. Actor, H. Gatos","doi":"10.1109/IEDM.1976.188983","DOIUrl":"https://doi.org/10.1109/IEDM.1976.188983","url":null,"abstract":"Quantitative analysis of the electron beam induced current makes it possible to evaluate the minority carrier lifetime three dimensionally in the bulk and the surface recombination velocity two dimensionally, with a high spacial resolution. The analysis is based on the concept of the effective excitation strength of the carriers which takes into consideration all possible recombination sources. Two dimensional mapping of the surface recombination velocity of phosphorus-diffused diodes is presented as well as a three dimensional mapping of minority carrier lifetime in ion implanted silicon.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124835594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Dielectric isolation using shallow oxide and polycrystalline silicon","authors":"J. Raffel, S. Bernacki","doi":"10.1109/IEDM.1976.189116","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189116","url":null,"abstract":"Previous work with polycrystalline isolation was limited in density by enhanced diffusion which precluded walled emitter geometries. Oxide isolation schemes are limited in depth by loss of planarity due to oxide bumps and resultant degradation in photolithographic definitions. A technique has been developed which combines polycrystalline isolation of collectors and shallow oxide isolation of bases. This approach is capable of proriding deep dielectric isolation, surface planarity and the high density of walled emitter geometries, a combination heretofore unobtainable by any other means. This isolation scheme has been used to fabricate ECL gate chains. The transistors were located in 2.5 micron thick n-epi islands surrounded by 5 × 105ohm-cm polysilicon selectively oxidized with silicon nitride masking to a thickness of one micron. The oxide bump at the nitride mask was typically 3000 Å and the epipoly step height was as small as 2600 Å. The circuits have polysilicon resistors and were fabricated using both thermal diffusion and ion implantation. The speed-power product of these circuits was approximately one-half that of junction isolated circuits.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125094684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A fully plasma etched-ion implanted CMOS process","authors":"A. Aitken, R. Poulsen, A. MacArthur, J.J. White","doi":"10.1109/IEDM.1976.189021","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189021","url":null,"abstract":"In this paper we shall describe the use of plasma etching and ion implantation to simplify CMOS processing and for tight control of fine dimensions. The above techniques have provided the basis for a CMOS process capable of fabricating devices with geometries as small as 2 microns. The process sequence will be described and some of the problems concerning specific fabrication steps will be discussed. None of the dry etching or ion implantation stages caused degradation of device characteristics. Device stability after step-stress accelerated life testing was of the same order as obtained with devices processed using wet chemical etching and conventional dopant deposition techniques.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130351444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Thin film AlAs/GaAs on graphite solar cells","authors":"W. D. Johnston, W. M. Callahan","doi":"10.1109/IEDM.1976.189083","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189083","url":null,"abstract":"We have prepared cells of polycrystalline N-AlAs on p-GaAs on graphite, with the III-V semiconductor layers grown by chloride transport vapor phase deposition. From the photocurrent response versus wavelength we infer electron diffusion lengths of 1.8 and 1.0 µm in the polycrystal GaAs at hole concentrations p ∼ 4 and 8 × 1018cm-3respectively. This indicates peak internal quantum efficiency exceeding 90%. External power efficiencies are limited by the large spreading resistance in the top AlAs layer due to poor majority carrier transfer across grain boundaries.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127679866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Correction of field distortion in the electron-beam lithography system, EL1","authors":"J. Loughran, M. Michail, P. Ryan, H. Engelke","doi":"10.1109/IEDM.1976.189077","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189077","url":null,"abstract":"","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":" 15","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120834218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A cross-point MNOS capacitor memory","authors":"A.S. Chawla, H. Lin","doi":"10.1109/IEDM.1976.189013","DOIUrl":"https://doi.org/10.1109/IEDM.1976.189013","url":null,"abstract":"High density in non-volatile MNOS thin oxide memory has been achieved by constructing a crosspoint capacitive cell memory. Since the memory cell is formed at the cross-point of a metal bus and silicon bus, it is perhaps the simplest structure in MNOS memories and gives a theoretical limit on the memory density. An 8×8 matrix of the cross-point memory has been fabricated. Writing and erasing are accomplished with half-select. Reading is accomplished by sensing whether the reading signal is coupled through the memory capacitor or not.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121032327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Hirachi, K. Kobayashi, K. Ogasawara, T. Hisatsugu, Y. Toyama
{"title":"A new operation mode \"Surfing mode\" in high-low-type GaAs IMPATTs","authors":"Y. Hirachi, K. Kobayashi, K. Ogasawara, T. Hisatsugu, Y. Toyama","doi":"10.1109/IEDM.1976.188995","DOIUrl":"https://doi.org/10.1109/IEDM.1976.188995","url":null,"abstract":"A new operation mode \"Surfing mode\" is proposed and verified experimentally in high-low-type GaAs IMPATTs. This mode is characterized by the concept that the avalanche charge pulse drifts synchronously with the movement of the front edge of the depletion layer at the higher velocity than the scattering-limited velocity. High- -low-type GaAs IMPATTs designed so as to operate effectively in the \"Surfing mode\" exhibited output powers 15 watts (ΔTj=210°C) at 6. 1 GHz 25 percent efficiencies.","PeriodicalId":106190,"journal":{"name":"1976 International Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131216370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}