A fully plasma etched-ion implanted CMOS process

Abstract

In this paper we shall describe the use of plasma etching and ion implantation to simplify CMOS processing and for tight control of fine dimensions. The above techniques have provided the basis for a CMOS process capable of fabricating devices with geometries as small as 2 microns. The process sequence will be described and some of the problems concerning specific fabrication steps will be discussed. None of the dry etching or ion implantation stages caused degradation of device characteristics. Device stability after step-stress accelerated life testing was of the same order as obtained with devices processed using wet chemical etching and conventional dopant deposition techniques.