IEEE Transactions on Materials for Electron Devices最新文献

BEOL-Compatible 5.6 nm Ultrathin HZO With Molybdenum Nitride Electrode and IN2O3 Channel Devices for Enhanced Ferroelectricity and Reliability beol兼容5.6 nm超薄HZO与氮化钼电极和IN2O3通道器件增强铁电性和可靠性

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-07-07 DOI: 10.1109/TMAT.2025.3586809

Li-Cheng Teng;Yu-Che Huang;Shin-Yuan Wang;Yu-Hsien Lin;Chao-Hsin Chien

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Call for Papers: Special Issue of IEEE Transactions on Electron Devices on Reliability of Advanced Nodes 论文征集：IEEE高级节点可靠性电子器件学报特刊

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-06-27 DOI: 10.1109/TMAT.2025.3583512

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Tunable Density-of-States in Chromium Oxide Thin Films via Room Temperature Laser Ablation 室温激光烧蚀氧化铬薄膜的可调态密度

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-06-19 DOI: 10.1109/TMAT.2025.3581508

Angel Regalado-Contreras;Wencel de la Cruz

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Transferable Freestanding Varactor Based on a Membrane Stack for Microwave Application 基于膜堆的可转移独立式变容管微波应用

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-06-17 DOI: 10.1109/TMAT.2025.3580484

Yating Ruan;Philipp Komissinskiy;Alexey Arzumanov;Holger Maune;Lambert Alff

{"title":"Transferable Freestanding Varactor Based on a Membrane Stack for Microwave Application","authors":"Yating Ruan;Philipp Komissinskiy;Alexey Arzumanov;Holger Maune;Lambert Alff","doi":"10.1109/TMAT.2025.3580484","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3580484","url":null,"abstract":"This work demonstrates the fabrication and characterization of a freestanding oxide varactor membrane designed for integration onto silicon substrates. An epitaxial varactor heterostructure composed of a 1% Mn-doped Ba<inline-formula><tex-math>$_{0.5}$</tex-math></inline-formula>Sr<inline-formula><tex-math>$_{0.5}$</tex-math></inline-formula>TiO<inline-formula><tex-math>$_{3}$</tex-math></inline-formula> dielectric layer and a <inline-formula><tex-math>$rm {SrMoO}_{3}$</tex-math></inline-formula> conductive layer was grown using pulsed laser deposition on a water-soluble sacrificial layer <inline-formula><tex-math>$rm {Sr_{3}Al_{2}O_{6}}$</tex-math></inline-formula>. After the lift-off process, the varactor heterostructure was successfully transferred onto a silicon substrate. Structural analysis confirms the high crystallinity and strain relaxation of the heterostructure after transfer. Electrical measurements reveal high tunability (<italic>n=1.7) at 120 V/<inline-formula><tex-math>$mu rm {m}$</tex-math></inline-formula>, a quality factor exceeding 100 at 1 MHz, and a low leakage current density well below 5 <inline-formula><tex-math>$text{A/m}^{2}$</tex-math></inline-formula>. This approach overcomes the challenges of direct oxide growth of epitaxial varactor heterostructures on silicon, such as lattice mismatch and chemical incompatibility. These results validate the potential of freestanding varactor membranes for agile microwave and RF applications, offering a scalable route for high-performance, multifunctional devices with low energy consumption in next-generation telecommunications and wireless networks.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"80-85"},"PeriodicalIF":0.0,"publicationDate":"2025-06-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11039081","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144557714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Improved Performance of Yttrium Oxide-Based Memristor Through TiN Electrodes and Device Scaling for Neuromorphic and Pattern Recognition 基于TiN电极的氧化钇基忆阻器性能改进及神经形态和模式识别的器件缩放

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-06-13 DOI: 10.1109/TMAT.2025.3579714

Sanjay Kumar;Shalu Rani

{"title":"Improved Performance of Yttrium Oxide-Based Memristor Through TiN Electrodes and Device Scaling for Neuromorphic and Pattern Recognition","authors":"Sanjay Kumar;Shalu Rani","doi":"10.1109/TMAT.2025.3579714","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3579714","url":null,"abstract":"Herein, we present a CMOS-compatible fabrication process, in-depth materials, and electrical analysis of yttrium oxide (Y2O3)-based memristive devices having a device size of 100 μm2. The fabricated devices exhibit improved performance by incorporating TiN electrodes and device scaling and efficiently emulate the various low-power neuromorphic and pattern recognition tasks. The fabricated memristive devices exhibit stable bipolar resistive switching behavior with an excellent endurance beyond 50,000 cycles and retention properties exceeding 106 s by maintaining a very high ON/OFF ratio of 104. Additionally, the fabricated devices show remarkable stability in the device switching voltages under cycle-to-cycle (C2C) and device-to-device (D2D) wherein, the coefficient of variability (<italic>CV) in the device switching voltages in C2C and D2D is 4.95% and 11.39%, respectively. Moreover, the fabricated devices efficiently emulate the synaptic response by emulating potentiation, depression, paired-pulse facilitation (PPF), and paired-pulse depression (PPD) and also exhibit the device conductance tunability under the variations in the pulse width as similar to the biological synapse counterpart. Furthermore, the fabricated devices efficiently show the pattern recognition task by achieving an accuracy of 88.2% for the handwriting MNIST dataset. Therefore, the present work opens a new horizon in the field of miniaturized artificial synapses and neuromorphic computing to perform various operations.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"72-79"},"PeriodicalIF":0.0,"publicationDate":"2025-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144524374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Call for Papers: Ultrawide Band Gap Semiconductor Devices for RF, Power and Optoelectronic Applications 论文征集：用于射频、功率和光电应用的超宽带隙半导体器件

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-04-21 DOI: 10.1109/TMAT.2025.3562290

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IEEE Electron Devices Society 电子器件学会

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-04-17 DOI: 10.1109/TMAT.2025.3561623

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Implementation of Low Temperature Co-Fired Ceramic Packages for All Solid-State Hydrogen Sensor Modules 全固态氢传感器模块低温共烧陶瓷封装的实现

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-04-17 DOI: 10.1109/TMAT.2025.3562178

Mun-Cheol Paek;Han-Won Ryu;Hyun Hwangbo;Yong-Ha Lee;Chong-Ook Park

{"title":"Implementation of Low Temperature Co-Fired Ceramic Packages for All Solid-State Hydrogen Sensor Modules","authors":"Mun-Cheol Paek;Han-Won Ryu;Hyun Hwangbo;Yong-Ha Lee;Chong-Ook Park","doi":"10.1109/TMAT.2025.3562178","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3562178","url":null,"abstract":"We have implemented LTCC (Low Temperature Co-Fired Ceramics) based packages for all solid-state electrochemical hydrogen sensor modules. The hydrogen sensor utilizing a solid electrolyte is designed to have a hetero-junction structure of a proton conductor and an oxygen ion conductor. LTCC is a composite material of ceramic powders and glass frits, and can be sintered at a low temperature of 900 °C or less, and has superior electrical, mechanical, and thermal properties compared to PCB. In this study, we developed a package technology for hydrogen sensor modules using this LTCC material. A double layer structure is used to form the package, and in the bottom plate, a mount for the hydrogen sensor, line guides for air flow, and guides to support the wires are fabricated. Laser pulses are employed to form 3D structures of LTCC including the mounting cavities and vias to connect the metal electrodes of the sensor. The hydrogen sensor is mounted in the center of the bottom plate and connected to the Ag/Pt electrode formed at the backside of the plate through 4 wires and via holes. The measurement results to check the hydrogen response of the sensors using LTCC packages show that the solid-state electrochemical voltage change from 248.2 ∼ 296.4 mV to 472.8 ∼ 554.5.2 mV for hydrogen concentration from 0.5 to 4.0% in the air. The electrochemical voltage of this sensor is linearly proportional to the logarithm of the hydrogen partial pressure. The reproducibility tests show that the change of the sensitivity of the sensor was within 4.3% deviation for 3 times repeat test. This reaction sensitivity remains the same with a deviation of less than 1.2% in the test even after 52 days. In the thermal shock test for environmental evaluation, all hydrogen sensor packages fabricated in this study show normal operation.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"42-48"},"PeriodicalIF":0.0,"publicationDate":"2025-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143938017","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Overview of Testing Methods for Mechanical and Adhesion Properties of Materials in Semiconductor Packages 半导体封装材料机械和粘附性能测试方法综述

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-04-16 DOI: 10.1109/TMAT.2025.3561740

Seung Jin Oh;Jae Hak Lee;Seung Man Kim;Seongheum Han;Ah-Young Park;Hyunkyu Moon;Jun-Yeob Song

{"title":"Overview of Testing Methods for Mechanical and Adhesion Properties of Materials in Semiconductor Packages","authors":"Seung Jin Oh;Jae Hak Lee;Seung Man Kim;Seongheum Han;Ah-Young Park;Hyunkyu Moon;Jun-Yeob Song","doi":"10.1109/TMAT.2025.3561740","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3561740","url":null,"abstract":"Mechanical testing methodologies are essential for advancing semiconductor packaging processes, ensuring the mechanical reliability of devices subjected to increasingly complex manufacturing processes and operational conditions. In recent years, advanced packaging technologies, including system-in-package (SiP) using 2.xD and 3D integration, have played a crucial role in enabling high-performance electronic devices. However, the miniaturization of device structures and integration of materials with mismatched thermomechanical properties have introduced significant mechanical challenges, including warpage, interfacial delamination, and fracture-induced failures. This review comprehensively evaluates key mechanical testing methodologies used to characterize the material properties and interfacial reliability of materials in semiconductor packages. Techniques such as the tensile test and double-cantilever beam (DCB) test are critically examined, with a focus on their effectiveness in assessing thin-film mechanical behavior, adhesion properties, and fracture mechanisms in miniaturized semiconductor structures. Furthermore, this review highlights the limitations of traditional testing techniques in micro- and nanoscale applications and explores emerging testing approaches. By providing a comparative analysis of mechanical testing techniques and their applications in semiconductor packaging, this work aims to provide insights for optimizing reliability evaluation strategies and guiding future developments in advanced packaging technologies.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"49-63"},"PeriodicalIF":0.0,"publicationDate":"2025-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143937983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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Temperature-Agnostic Pt/Au Ohmic Contacts on n-Type Gallium Nitride for Self-Aligned MOSFETs 用于自对准mosfet的n型氮化镓上的温度无关Pt/Au欧姆触点

IEEE Transactions on Materials for Electron Devices Pub Date : 2025-04-11 DOI: 10.1109/TMAT.2025.3559869

Kevin J. Reilly;Andrew T. Binder;Jeffrey Steinfeldt;Andrew Allerman;Robert J. Kaplar

{"title":"Temperature-Agnostic Pt/Au Ohmic Contacts on n-Type Gallium Nitride for Self-Aligned MOSFETs","authors":"Kevin J. Reilly;Andrew T. Binder;Jeffrey Steinfeldt;Andrew Allerman;Robert J. Kaplar","doi":"10.1109/TMAT.2025.3559869","DOIUrl":"https://doi.org/10.1109/TMAT.2025.3559869","url":null,"abstract":"Five alternative metals are investigated as ohmic contacts to <italic>n-GaN including Cr/Au, Mo/Au, Pt/Au, Pd/Au, and Ge/Au. Ti-based contacts are traditionally used for ohmic contacts on <italic>n-GaN. However, conventional Ti/Al/Ni/Au metallization is found to be incompatible with a self-aligned process for GaN trench MOSFETs due to wet etch restrictions. Therefore, an alternative metallization is needed that is unreactive to the etch chemistry used in the self-aligned process. Additionally, the contact should remain ohmic following anneal at 900 °C so that contact formation can precede the anneal required for <italic>p-dopant activation. In the present work, an <italic>n-GaN bilayer, consisting of a thin heavily doped contact layer (<italic>n0 = 1 × 1020 cm−3) atop a thick lesser doped layer, is used to demonstrate ohmic contacts of alternative metals with low specific contact resistance and extended thermal budget. Cr/Au ohmic contacts are demonstrated up to anneal temperatures of 800 °C, an increase of 200 °C compared to the highest known reports for Cr/Au contacts on <italic>n-GaN. Pt/Au metallization is demonstrated as an ohmic contact to <italic>n-GaN for the first time and exhibits true temperature-agnostic behavior up to anneal temperatures of 900 °C with specific contact resistance that is near parity with Ti/Al/Ni/Au. The temperature-agnostic behavior of Pt/Au ohmic contacts on the <italic>n-GaN bilayer, in addition to chemical compatibility with the self-aligned process, positions Pt/Au contacts as a key enabling element for self-aligned trench MOSFETs on GaN.","PeriodicalId":100642,"journal":{"name":"IEEE Transactions on Materials for Electron Devices","volume":"2 ","pages":"34-41"},"PeriodicalIF":0.0,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143908428","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0