Chip最新文献

{"title":"A high-performance tensor computing unit for deep learning acceleration","authors":"Qiang Zhou ,&nbsp;Tieli Sun ,&nbsp;Taoran Shen ,&nbsp;York Xue","doi":"10.1016/j.chip.2025.100145","DOIUrl":"10.1016/j.chip.2025.100145","url":null,"abstract":"<div><div>The increasing complexity of neural network applications has led to a demand for higher computational parallelism and more efficient synchronization in artificial intelligence (AI) chips. To achieve higher performance and lower power, a comprehensive and efficient approach is required to compile neural networks for implementation on dedicated hardware. Our first-generation deep learning accelerator, tensor computing unit, was presented with hardware and software solutions. It offered dedicated very long instruction words (VLIWs) instructions and multi-level repeatable direct memory access (DMA). The former lowers the instruction bandwidth requirement and makes it easier to parallelize the index and vector computations. The latter reduces the communication latency between the compute core and the asynchronous DMA, and also greatly alleviates the programming complexity. For operator implementation and optimization, the compiler-based data-flow generator and the instruction macro generator first produced a set of parameterized operators. Then, the tuner-configuration generator pruned the search space and the distributed tuner framework selected the best data-flow pattern and corresponding parameters. Our tensor computing unit supports all the convolution parameters with full-shape dimensions. It can readily select proper operators to achieve 96% of the chip peak performance under certain shapes and find the best performance implementation within limited power. The evaluation of a large number of convolution shapes on our tensor computing unit chip shows the generated operators significantly outperform the hand-written ones, achieving 9% higher normalized performance than CUDA according to the silicon data.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 2","pages":"Article 100145"},"PeriodicalIF":0.0,"publicationDate":"2025-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144106756","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Polarization reversal enhanced intelligent recognition in two-dimensional MoTe2/GeSe heterostructure","authors":"Ling Bai ,&nbsp;Ziting Yang ,&nbsp;Jie Wen ,&nbsp;Zifeng Mai ,&nbsp;Bin Liu ,&nbsp;Duanyang Liu ,&nbsp;Penghong Ci ,&nbsp;Liyuan Liu ,&nbsp;Yiyang Xie ,&nbsp;Ziqi Zhou ,&nbsp;Yali Yu ,&nbsp;Zhongming Wei","doi":"10.1016/j.chip.2025.100143","DOIUrl":"10.1016/j.chip.2025.100143","url":null,"abstract":"<div><div>Wide-spectral and polarization-sensitive photodetectors are vital for applications in imaging, communication, and intelligent sensing. Although two-dimensional (2D) materials have shown great promise in enhancing the performance of these devices, conventional methods for spectral discrimination often rely on complex designs, such as external filters or multisensor systems, increasing system cost and complexity. Developing simplified devices that integrate spectral and polarization detection remains a key challenge. Here, we demonstrated a 2D MoTe₂/GeSe-based photodetector with wide-spectral photoresponse (400 to 1064 nm) and polarization sensitivity, achieving a responsivity of 1.35 A W⁻¹ and a polarization ratio of 2.23 under 808 nm illumination. The device exhibited a unique 90° polarization reversal between green (532 nm) and red (808 nm), providing a novel mechanism for spectral discrimination. First-principles calculations reveal the polarization reversal phenomenon based on the heterostructure's optical anisotropy. Furthermore, integration with a convolutional neural network enables intelligent traffic signal recognition using polarization-sensitive images. This work highlights the potential of MoTe₂/GeSe heterostructures for next-generation photodetectors, offering compact, multifunctional solutions with integrated spectral and polarization discrimination capabilities.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 3","pages":"Article 100143"},"PeriodicalIF":0.0,"publicationDate":"2025-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144298768","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Root cause of read after delay in ferroelectric memories","authors":"Diqing Su ,&nbsp;Shaorui Li ,&nbsp;Xiao Wang ,&nbsp;Yannan Xu ,&nbsp;Qingting Ding ,&nbsp;Heng Zhang ,&nbsp;Hangbing Lyu","doi":"10.1016/j.chip.2025.100139","DOIUrl":"10.1016/j.chip.2025.100139","url":null,"abstract":"<div><div>Accelerated margin loss during read after delay (RAD) is a newly discovered reliability concern in HfO₂-based ferroelectric random access memories (FeRAMs), which significantly impacts the lifetime of the memory device. Unlike conventional fatigue effect, this issue is closely linked to the coercive field (<span><math><mrow><msub><mi>E</mi><mi>c</mi></msub></mrow></math></span>) shift, or imprint, during bipolar electrical field cycling at intermediate frequency. The precise cause of imprint during RAD, however, remains elusive. To investigate, we employed customized electrical testing to examine the charge transfer behavior in static imprint (SI) and continuous read/write (CRW) scenarios, which can be viewed as RAD performed at minimum and maximum frequencies. Our findings reveal that interfacial charge injection is the primary mechanism for imprint in SI, while bulk charge drives the imprint in asymmetric CRW. Further exploration with a SPICE-based charge transfer model suggests that RAD-related imprint is the result of bulk charge migration, driven by the periodically restored depolarization field after read/write-back operation. Experimental verification supports this theory, highlighting the importance of interface engineering to enhance bound charge screening and element doping to elevate the migration barrier for bulk charges in addressing the RAD problem.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 3","pages":"Article 100139"},"PeriodicalIF":0.0,"publicationDate":"2025-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144306710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An electrostatic micro-electromechanical systems micromirror with low-torsional stress supported by three-asymptote beam","authors":"Xiao-Yong Fang ,&nbsp;Ang Li ,&nbsp;Er-Qi Tu,&nbsp;Bo Peng,&nbsp;Zhi-Ran Yi,&nbsp;Wen-Ming Zhang","doi":"10.1016/j.chip.2025.100138","DOIUrl":"10.1016/j.chip.2025.100138","url":null,"abstract":"<div><div>Micro-electromechanical systems (MEMS) micromirrors are preferred actuators in the field of light beam steering. Electrostatic micromirrors have gained vital attention due to their simple and compact structure. Among performance characteristics, the large field of view (FOV) and high structural reliability are key research hotspots. This work introduced a novel design of a three-asymptote support beam to improve the structural reliability, which is defined as a function with a shape coefficient, A. Simulation results reveal that the three-asymptote beam can reduce the chamfer stress from 690 MPa to 280 MPa compared with the conventional straight beam. Additionally, the resonant frequency of the micromirror can be adjusted via the shape coefficient. The micromirror prototype was fabricated using silicon-on-insulator-based micromachining and double-sided lithography technology. The vertically asymmetric electrostatic actuator comprises movable combs in the device layer and fixed combs in the handle layer. Furthermore, the performance of the prototype was tested in both static and resonant modes. The maximum static mechanical angle is 4.3° with a direct current voltage of 60 V, and the maximum angle is 3.1° at 445 Hz with a peak-to-peak voltage of 20 V in resonant mode.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 3","pages":"Article 100138"},"PeriodicalIF":0.0,"publicationDate":"2025-03-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144471443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A high-efficiency modeling method for analog integrated circuits","authors":"Dongdong Chen ,&nbsp;Yunqi Yang ,&nbsp;Xianglong Wang ,&nbsp;Di Li ,&nbsp;Guoqing Xin ,&nbsp;Yintang Yang","doi":"10.1016/j.chip.2025.100135","DOIUrl":"10.1016/j.chip.2025.100135","url":null,"abstract":"<div><div>Integrated circuits (ICs) are the foundation of information technology development. The optimal design scheme of an analog IC is determined by iteratively running the simulation software and comparing the performance metrics. However, the simulation software of an analog IC is time-consuming, which leads to the low design efficiency. Due to the nonideal factors in analog ICs, the nonlinear relationship between design parameters and performance metrics cannot be well described by the deduced approximation equations. Inspired by the image and semantic recognition, a universal high-efficiency modeling method for analog ICs based on convolutional neural network (CNN) was proposed in the current work, named as CNN-IC. The sparse topology mapping method was proposed to map the design parameters into a sparse matrix, which includes the spatial and transistor characteristics of analog IC. The CNN model with three convolutional kernels was constructed to extract “transistor-circuit module-integrate circuit” features level by level, which can replace the simulation software to effectively improve the training efficiency and accuracy. Two typical analog ICs were selected to verify the effectiveness of the CNN-IC model. The results show that the accuracy of the CNN-IC model could reach over 99% and that its convergence rate was the fastest compared with the machine learning models in the state of the art.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 3","pages":"Article 100135"},"PeriodicalIF":0.0,"publicationDate":"2025-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144338906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Tunable optoelectronic memristor based on MoS2/BaTiO3 for neuromorphic vision","authors":"Ziliang Fang ,&nbsp;Bingyu Chen ,&nbsp;Rui Rong ,&nbsp;Hanrong Xie ,&nbsp;Manyan Xie ,&nbsp;Haoran Guo ,&nbsp;Yang Li ,&nbsp;Fangheng Fu ,&nbsp;Xu Ouyang ,&nbsp;Yuming Wei ,&nbsp;Gangding Peng ,&nbsp;Tiefeng Yang ,&nbsp;Huihui Lu ,&nbsp;Heyuan Guan","doi":"10.1016/j.chip.2025.100136","DOIUrl":"10.1016/j.chip.2025.100136","url":null,"abstract":"<div><div>Human vision–inspired neuromorphic devices have integrated architectures that combine sensing, computing, and storage functions, which can fundamentally avoid the energy waste caused by frequent data movement in the currently widely used von Neumann architecture, and have crucial application potential in advanced artificial intelligence chips that pursue low power consumption and low latency. However, previously reported visual neuromorphic devices either suffer complex floating gate, vertically stacked multilayer structures, or necessitate separated optical-sensing and synaptic units, realizing highly compact, non-volatile optoelectronic response and continuously tunable conductivity within a sententious architecture remains a significant challenge. Here, we presented a low-cost exfoliation and transfer method combined with spin-coating to fabricate molybdenum disulfide (MoS₂)/barium titanate (BaTiO₃) heterostructured optoelectronic devices. Based on the ferroelectricity of BaTiO₃ and the charge transport characteristics of MoS₂, the hysteresis of ferroelectric polarization upon both electric and optical stimulation is successfully endowed with reliable resistance state switching abilities, showing the advantages of low bias voltage operation (±2 V) and distinct 16 conductance states under light pulse irradiation. Besides, the MoS₂/BaTiO₃ device can be further used to emulate biological synaptic behavior and accomplish the transition from short-term memory (STM) to long-term memory (LTM). Notably, leveraging the dual characteristics of imaging and neuromorphic behavior, we constructed a multi-layer perceptron network integrating visual perception and image recognition, showing an accuracy of 97.6% in the Modified National Institute of Standards and Technology (MNIST) pattern recognition task. This work introduced a simple MoS₂/BaTiO₃ heterojunction architecture device, offering integrated perception, storage, and computing capabilities, providing a new possibility for future compact neuromorphic computing devices.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 3","pages":"Article 100136"},"PeriodicalIF":0.0,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144261296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"SOT-MRAM-based true in-memory computing architecture for approximate multiplication","authors":"Min Song ,&nbsp;Qilong Tang ,&nbsp;Xintong Ouyang ,&nbsp;Wei Duan ,&nbsp;Yan Xu ,&nbsp;Shuai Zhang ,&nbsp;Long You","doi":"10.1016/j.chip.2025.100134","DOIUrl":"10.1016/j.chip.2025.100134","url":null,"abstract":"<div><div>The in-memory computing (IMC) paradigm emerges as an effective solution to break the bottlenecks of conventional von Neumann architecture. In the current work, an approximate multiplier in spin-orbit torque magnetoresistive random access memory (SOT-MRAM) based true IMC (STIMC) architecture was presented, where computations were performed natively within the cell array instead of in peripheral circuits. Firstly, basic Boolean logic operations were realized by utilizing the feature of unipolar SOT device. Two majority gate-based imprecise compressors and an ultra-efficient approximate multiplier were then built to reduce the energy and latency. An optimized data mapping strategy facilitating bit-serial operations with an extensive degree of parallelism was also adopted. Finally, the performance enhancements by performing our approximate multiplier in image smoothing were demonstrated. Detailed simulation results show that the proposed 8 × 8 approximate multiplier could reduce the energy and latency at least by 74.2% and 44.4% compared with the existing designs. Moreover, the scheme could achieve improved peak signal-to-noise ratio (PSNR) and structural similarity index metric (SSIM), ensuring high-quality image processing outcomes.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 2","pages":"Article 100134"},"PeriodicalIF":0.0,"publicationDate":"2025-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144106755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Corrigendum to “Wang, Z. et al. Van der Waals ferroelectric transistors: the all-round artificial synapses for high-precision neuromorphic computing” Chip 2 (2023) 100044","authors":"Zhongwang Wang ,&nbsp;Xuefan Zhou ,&nbsp;Xiaochi Liu ,&nbsp;Aocheng Qiu ,&nbsp;Caifang Gao ,&nbsp;Yahua Yuan ,&nbsp;Yumei Jing ,&nbsp;Dou Zhang ,&nbsp;Wenwu Li ,&nbsp;Hang Luo ,&nbsp;Junhao Chu ,&nbsp;Jian Sun","doi":"10.1016/j.chip.2024.100100","DOIUrl":"10.1016/j.chip.2024.100100","url":null,"abstract":"","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 1","pages":"Article 100100"},"PeriodicalIF":0.0,"publicationDate":"2025-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141700701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Characterizing the spatial potential of an ion trap chip","authors":"Qingqing Qin ,&nbsp;Ting Chen ,&nbsp;Xinfang Zhang ,&nbsp;Baoquan Ou ,&nbsp;Jie Zhang ,&nbsp;Chunwang Wu ,&nbsp;Yi Xie ,&nbsp;Wei Wu ,&nbsp;Pingxing Chen","doi":"10.1016/j.chip.2024.100126","DOIUrl":"10.1016/j.chip.2024.100126","url":null,"abstract":"<div><div>The accurate characterization of the spatial electric field generated by electrodes in a surface electrode trap is of paramount importance. In this pursuit, we have identified a simple yet highly precise parametric expression to describe the spatial field of a rectangular-shaped electrode. Leveraging this expression, we introduced an optimization method designed to accurately characterize the axial electric field intensity produced by the powered electrode and the stray field. Distinct from the existing methods, our approach integrates a diverse array of experimental data, including the equilibrium positions of ions in a linear string, the equilibrium positions of single trapped ions, and trap frequencies, to effectively reduce the systematic errors. This approach provides considerable flexibility in voltage settings for data acquisition, making it especially advantageous for surface electrode traps where the trapping height of ion probes may vary with casual voltage settings. In our experimental demonstration, we successfully minimized the discrepancy between observations and model predictions to a remarkable degree. The relative errors of secular frequencies were contained within ±0.5%, and the positional error of ions was constrained to less than 1.2 μm, which surpasses the performance of current methodologies.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 1","pages":"Article 100126"},"PeriodicalIF":0.0,"publicationDate":"2025-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143636751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"GaN chips for monitoring density and temperature of lead-acid batteries","authors":"Zhiyong Ye ,&nbsp;Ganyuan Deng ,&nbsp;Dongmiao Liu ,&nbsp;Jingyan Wang ,&nbsp;Xiaodi Gao ,&nbsp;Kwai Hei Li ,&nbsp;Ling Zhu","doi":"10.1016/j.chip.2025.100133","DOIUrl":"10.1016/j.chip.2025.100133","url":null,"abstract":"<div><div>Lead-acid batteries are indispensable in various applications, and it is crucial to monitor their status. However, the existing sensing units for lead-acid batteries are limited by their bulky size, slow response time, and lack of temperature sensing and compensation capabilities. In the current work, a compact GaN-based sensing device was proposed to simultaneously measure the electrolyte density and temperature. The device comprises a light-emitting diode (LED) and a photodetector (PD) integrated on a GaN-on-sapphire chip in a monolithic configuration. The forward voltage of the LED reflects the electrolyte temperature, while the photocurrent of the PD varies with electrolyte density due to optical reflection changes at the exposed sapphire interface. The measured signals were processed using a decoupling matrix to achieve temperature compensation. The device exhibits a sensitivity of −29.1 μA/(g/cm³) for density in the range of 1.09 g/cm³ to 1.29 g/cm³, and -1.07 mV/°C for temperature in the range of 25 to 45 °C. The performance of the device was also validated through comparisons with commercial meters and real-time monitoring during the charging and discharging of the batteries. The device has notable advantages in size, cost, and fast response/recovery time (134.3/201.4 ms), rendering it a promising tool for monitoring lead-acid batteries.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"4 3","pages":"Article 100133"},"PeriodicalIF":0.0,"publicationDate":"2025-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144261297","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}