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Q-enhancement of piezoelectric micro-oven-controlled MEMS resonators using honeycomb lattice phononic crystals 利用蜂巢晶格声波晶体增强压电微炉控 MEMS 谐振器的 Q 值
Chip Pub Date : 2024-09-19 DOI: 10.1016/j.chip.2024.100108
Yuhao Xiao , Kewen Zhu , Jinzhao Han , Sheng Liu , Guoqiang Wu
{"title":"Q-enhancement of piezoelectric micro-oven-controlled MEMS resonators using honeycomb lattice phononic crystals","authors":"Yuhao Xiao ,&nbsp;Kewen Zhu ,&nbsp;Jinzhao Han ,&nbsp;Sheng Liu ,&nbsp;Guoqiang Wu","doi":"10.1016/j.chip.2024.100108","DOIUrl":"10.1016/j.chip.2024.100108","url":null,"abstract":"<div><div>In this article, a two-dimensional (2D) honeycomb lattice phononic crystal (PnC) based micro-oven with large bandgap is introduced to be integrated with piezoelectric microelectromechanical systems (MEMS) resonator to reduce anchor loss for timing applications. Finite element method (FEM) analysis and experimental measurement were performed to verify that the proposed PnC micro-oven design gives advantage in quality factor (<em>Q</em>). The measurement results demonstrate that the resonator with 2D honeycomb lattice PnC micro-oven shows a repeatable 1.7 times improvement of average <em>Q</em> compared with the bare one. The resonator with micro-oven control was further measured for frequency stability. The proposed piezoelectric micro-oven-controlled MEMS resonator achieves a frequency stability of less than ±10 ppb in a stable environment, which indicates promising potential for application in high-end timing field.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 4","pages":"Article 100108"},"PeriodicalIF":0.0,"publicationDate":"2024-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142707270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Suspended nanomembrane silicon photonic integrated circuits 悬浮纳米膜硅光子集成电路
Chip Pub Date : 2024-09-01 DOI: 10.1016/j.chip.2024.100104
Rongxiang Guo , Qiyue Lang , Zunyue Zhang , Haofeng Hu , Tiegen Liu , Jiaqi Wang , Zhenzhou Cheng
{"title":"Suspended nanomembrane silicon photonic integrated circuits","authors":"Rongxiang Guo ,&nbsp;Qiyue Lang ,&nbsp;Zunyue Zhang ,&nbsp;Haofeng Hu ,&nbsp;Tiegen Liu ,&nbsp;Jiaqi Wang ,&nbsp;Zhenzhou Cheng","doi":"10.1016/j.chip.2024.100104","DOIUrl":"10.1016/j.chip.2024.100104","url":null,"abstract":"<div><p><strong>Leveraging the low linear and nonlinear absorption loss of silicon at</strong> <strong>mid-infrared</strong> <strong>(mid-IR) wavelengths, silicon photonic integrated circuits (PICs) have attracted significant attention for</strong> <strong>mid-IR</strong> <strong>applications including optical sensing, spectroscopy, and nonlinear optics. However,</strong> <strong>mid-IR</strong> <strong>silicon PICs typically show moderate performance compared to</strong> <strong>state-of-the-art</strong> <strong>silicon photonic devices operating in the telecommunication band. Here, we proposed and demonstrated suspended nanomembrane silicon (SNS) PICs with light</strong><strong>-</strong><strong>guiding within</strong> <strong>deep-subwavelength</strong> <strong>waveguide thickness for operation in the short</strong><strong>-</strong><strong>wavelength</strong> <strong>mid-IR</strong> <strong>region. We demonstrated key building components, namely, grating couplers, waveguide arrays,</strong> <strong>micro-resonators,</strong> <strong>etc.,</strong> <strong>which</strong> <strong>exhibit</strong> <strong>excellent performances in bandwidths, back reflections, quality factors, and fabrication tolerance. Moreover,</strong> <strong>the results</strong> <strong>show that the proposed SNS PICs have high compatibility with the</strong> <strong>multi-project</strong> <strong>wafer foundry services. Our study provides an unprecedented platform for</strong> <strong>mid-IR</strong> <strong>integrated</strong> <strong>photonics and applications.</strong></p></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 3","pages":"Article 100104"},"PeriodicalIF":0.0,"publicationDate":"2024-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2709472324000224/pdfft?md5=cd27c1841a4799cf4cf48ad7ef718a52&pid=1-s2.0-S2709472324000224-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141691844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrical performance and reliability analysis of vertical gallium nitride Schottky barrier diodes with dual-ion implanted edge termination 具有双离子植入边缘终端的垂直 GaN 肖特基势垒二极管的电气性能和可靠性分析
Chip Pub Date : 2024-09-01 DOI: 10.1016/j.chip.2024.100105
Bo Li , Jinpei Lin , Linfei Gao , Zhengweng Ma , Huakai Yang , Zhihao Wu , Hsien-Chin Chiu , Hao-Chung Kuo , Chunfu Zhang , Zhihong Liu , Shuangwu Huang , Wei He , Xinke Liu
{"title":"Electrical performance and reliability analysis of vertical gallium nitride Schottky barrier diodes with dual-ion implanted edge termination","authors":"Bo Li ,&nbsp;Jinpei Lin ,&nbsp;Linfei Gao ,&nbsp;Zhengweng Ma ,&nbsp;Huakai Yang ,&nbsp;Zhihao Wu ,&nbsp;Hsien-Chin Chiu ,&nbsp;Hao-Chung Kuo ,&nbsp;Chunfu Zhang ,&nbsp;Zhihong Liu ,&nbsp;Shuangwu Huang ,&nbsp;Wei He ,&nbsp;Xinke Liu","doi":"10.1016/j.chip.2024.100105","DOIUrl":"10.1016/j.chip.2024.100105","url":null,"abstract":"<div><p>In this study, a gallium nitride (GaN) substrate and its 15 μm epitaxial layer were entirely grown by adopting the hydride vapor phase epitaxy (HVPE) technique. To enhance the breakdown voltage (<em>V</em><sub>BR</sub>) of vertical GaN-on-GaN Schottky barrier diodes (SBDs), a dual ion coimplantation of carbon and helium was employed to create the edge termination. The resulting devices exhibited a low turn-on voltage of 0.55 V, a high <em>I</em><sub>on</sub>/<em>I</em><sub>off</sub> ratio of approximately 10<sup>9</sup>, and a low specific on-resistance of 1.93 mΩ cm<sup>2</sup>. When the ion implantation edge was terminated, the maximum <em>V</em><sub>BR</sub> of the devices reached 1575 V, with an average improvement of 126%. These devices demonstrated a high figure of merit (FOM) of 1.28 GW cm<sup>–2</sup> and showed excellent reliability during pulse stress testing.</p></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 3","pages":"Article 100105"},"PeriodicalIF":0.0,"publicationDate":"2024-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2709472324000236/pdfft?md5=39e7a0c9e23864accd3ca2de9e3d77c6&pid=1-s2.0-S2709472324000236-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141844463","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Channel-bias-controlled reconfigurable silicon nanowire transistors via an asymmetric electrode contact strategy 通过非对称电极接触策略实现通道偏压控制的可重构硅纳米线晶体管
Chip Pub Date : 2024-09-01 DOI: 10.1016/j.chip.2024.100098
{"title":"Channel-bias-controlled reconfigurable silicon nanowire transistors via an asymmetric electrode contact strategy","authors":"","doi":"10.1016/j.chip.2024.100098","DOIUrl":"10.1016/j.chip.2024.100098","url":null,"abstract":"<div><p>Reconfigurable field-effect transistors (R-FETs) that can dynamically reconfigure the transistor polarity, from n-type to p-type channel or vice versa, represent a promising new approach to reduce the logic complexity and granularity of programmable electronics. Although R-FETs have been successfully demonstrated upon silicon nanowire (SiNW) channels, a pair of extra program gates is still needed to control the source/drain (S/D) contacts. In this work, we propose a rather simple single gate R-FET structure with an asymmetric S/D electrode contact, where the FET channel polarity can be altered by changing the sign of channel bias <em>V</em><sub>ds</sub>. These R-FETs were fabricated upon an orderly array of planar SiNW channels, grown via in-plane solid-liquid-solid mechanism, and contacted by Ti/Al and Pt/Au at the S/D electrodes, respectively. Remarkably, this channel-bias-controlled R-FET strategy has been successfully testified and implemented upon both p-type-doped (with indium dopants) or n-type-doped (phosphorus) SiNW channels, whereas the R-FET prototypes demonstrate an impressive high <em>I</em><sub>on/off</sub> ratio of &gt; 10<sup>6</sup> and a steep subthreshold swing of 79 mV/dec. These results indicate a rather simple, compact and generic enough R-FET strategy for the construction of a new generation of SiNW-based programmable and low-power electronics.</p></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 3","pages":"Article 100098"},"PeriodicalIF":0.0,"publicationDate":"2024-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2709472324000169/pdfft?md5=e3070abd5dfb82b3bdcb7e25f29beb8d&pid=1-s2.0-S2709472324000169-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141411691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Highly sensitive diamond X-ray detector array for high-temperature applications 用于高温应用的高灵敏度金刚石 X 射线探测器阵列
Chip Pub Date : 2024-09-01 DOI: 10.1016/j.chip.2024.100106
Wenjie Dou , Chaonan Lin , Wei Fan , Xun Yang , Chao Fang , Huaping Zang , Shaoyi Wang , Congxu Zhu , Zhi Zheng , Weimin Zhou , Chongxin Shan
{"title":"Highly sensitive diamond X-ray detector array for high-temperature applications","authors":"Wenjie Dou ,&nbsp;Chaonan Lin ,&nbsp;Wei Fan ,&nbsp;Xun Yang ,&nbsp;Chao Fang ,&nbsp;Huaping Zang ,&nbsp;Shaoyi Wang ,&nbsp;Congxu Zhu ,&nbsp;Zhi Zheng ,&nbsp;Weimin Zhou ,&nbsp;Chongxin Shan","doi":"10.1016/j.chip.2024.100106","DOIUrl":"10.1016/j.chip.2024.100106","url":null,"abstract":"<div><div>Diamond is a highly suitable material for X-ray detectors that can function effectively in harsh environments due to its unique properties such as ultrawide bandgap, high radiation resistance, excellent carrier mobility as well as remarkable chemical and thermal stability. However, the sensitivity of diamond X-ray detectors needs further improvement due to the relatively low X-ray absorption efficiency of diamond, and the exploration of single-crystal diamond array imaging still remains unexplored. In the current work, a 10 × 10 X-ray photodetector array was constructed from single-crystal diamond. To improve the sensitivity of the diamond X-ray detector, an asymmetric sandwich electrode structure was utilized. Additionally, trenches were created through laser cutting to prevent crosstalk between adjacent pixels. The diamond X-ray detector array exhibits exceptional performance, including a low detection limit of 4.9 nGy s<sup>−1</sup>, a sensitivity of 14.3 mC Gy<sup>−1</sup> cm<sup>−2</sup>, and a light-dark current ratio of 18,312, which are among the most favorable values ever reported for diamond X-ray detectors. Furthermore, these diamond X-ray detectors can operate at high temperatures up to 450 °C, making them suitable for development in harsh environments.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 3","pages":"Article 100106"},"PeriodicalIF":0.0,"publicationDate":"2024-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2709472324000248/pdfft?md5=641348a92d64c73eaa83ace8518de946&pid=1-s2.0-S2709472324000248-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142206231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Challenges and recent advances in HfO2-based ferroelectric films for non-volatile memory applications 非易失性存储器应用中基于 HfO2 的铁电薄膜所面临的挑战和最新进展
Chip Pub Date : 2024-09-01 DOI: 10.1016/j.chip.2024.100101
{"title":"Challenges and recent advances in HfO2-based ferroelectric films for non-volatile memory applications","authors":"","doi":"10.1016/j.chip.2024.100101","DOIUrl":"10.1016/j.chip.2024.100101","url":null,"abstract":"<div><div>The emergence of data-centric applications such as artificial intelligence (AI), machine learning, and the Internet of Things (IoT), has promoted surges in demand for storage memories with high operating speed and nonvolatile characteristics. HfO<sub>2</sub>-based ferroelectric memory technologies, which emerge as a promising alternative, have attracted considerable attention due to their high performance, energy efficiency, and full compatibility with the standard complementary metal-oxide-semiconductors (CMOS) process. These nonvolatile storage elements, such as ferroelectric random access memory (FeRAM), ferroelectric field-effect transistors (FeFETs), and ferroelectric tunnel junctions (FTJs), possess different data access mechanisms, individual merits, and specific application boundaries in next-generation memories or even beyond von Neumann architecture. This paper provides an overview of ferroelectric HfO<sub>2</sub> memory technologies, addresses the current challenges, and offers insights into future research directions and prospects.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 3","pages":"Article 100101"},"PeriodicalIF":0.0,"publicationDate":"2024-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141394538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A universal optoelectronic imaging platform with wafer-scale integration of two-dimensional semiconductors 二维半导体晶圆级集成的通用光电成像平台
Chip Pub Date : 2024-08-08 DOI: 10.1016/j.chip.2024.100107
Xinyu Wang , Die Wang , Yuchen Tian , Jing Guo , Jinshui Miao , Weida Hu , Hailu Wang , Kang Liu , Lei Shao , Saifei Gou , Xiangqi Dong , Hesheng Su , Chuming Sheng , Yuxuan Zhu , Zhejia Zhang , Jinshu Zhang , Qicheng Sun , Zihan Xu , Peng Zhou , Honglei Chen , Wenzhong Bao
{"title":"A universal optoelectronic imaging platform with wafer-scale integration of two-dimensional semiconductors","authors":"Xinyu Wang ,&nbsp;Die Wang ,&nbsp;Yuchen Tian ,&nbsp;Jing Guo ,&nbsp;Jinshui Miao ,&nbsp;Weida Hu ,&nbsp;Hailu Wang ,&nbsp;Kang Liu ,&nbsp;Lei Shao ,&nbsp;Saifei Gou ,&nbsp;Xiangqi Dong ,&nbsp;Hesheng Su ,&nbsp;Chuming Sheng ,&nbsp;Yuxuan Zhu ,&nbsp;Zhejia Zhang ,&nbsp;Jinshu Zhang ,&nbsp;Qicheng Sun ,&nbsp;Zihan Xu ,&nbsp;Peng Zhou ,&nbsp;Honglei Chen ,&nbsp;Wenzhong Bao","doi":"10.1016/j.chip.2024.100107","DOIUrl":"10.1016/j.chip.2024.100107","url":null,"abstract":"<div><div>Photodetectors (PDs) are crucial in modern society as they enable the detection of a diverse range of light-based signals. With the exponential increase in their development, materials are being used to create a wide range of PDs that play critical roles in enabling various applications and technologies. Image sensor technology has been hindered due to the lack of a universal system that can integrate all types of PDs with silicon-based readout integrated circuits (ROICs). To address this issue, we conducted experiments adopting two-dimensional materials as an example. High-performance MoS<sub>2</sub>-/MoTe<sub>2</sub>-based PDs were fabricated in the current work and the most suitable ROICs were identified to pair with them. This established a solid foundation for further researches in the field of image sensors. We developed and implemented a versatile testing system that uses a printed circuit board to connect the PD and ROIC. After the ROIC generates the sampled signal, it is collected and processed by algorithms, which overcome device uniformity limitations and produce a high-quality image that is visible to the naked eye. This universal system can be used with a wide range of PD and ROIC types made from different materials, making it highly convenient for diverse testing applications and the development of diverse image sensor types. This robust new platform is expected to spur further innovation and advancements in this rapidly developing field.</div></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 4","pages":"Article 100107"},"PeriodicalIF":0.0,"publicationDate":"2024-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142206230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Corrigendum to “Wang, Z. et al. Van der Waals ferroelectric transistors: the all-round artificial synapses for high-precision neuromorphic computing” Chip 2 (2023) 100044 范德华铁电晶体管:用于高精度神经形态计算的全方位人工突触 "的更正,Chip 2 (2023) 100044
Chip Pub Date : 2024-07-01 DOI: 10.1016/j.chip.2024.100100
Zhongwang Wang, Xuefan Zhou, Xiaochi Liu, Aocheng Qiu, Caifang Gao, Yahua Yuan, Yumei Jing, Dou Zhang, Wenwu Li, Hang Luo, Junhao Chu, Jian Sun
{"title":"Corrigendum to “Wang, Z. et al. Van der Waals ferroelectric transistors: the all-round artificial synapses for high-precision neuromorphic computing” Chip 2 (2023) 100044","authors":"Zhongwang Wang, Xuefan Zhou, Xiaochi Liu, Aocheng Qiu, Caifang Gao, Yahua Yuan, Yumei Jing, Dou Zhang, Wenwu Li, Hang Luo, Junhao Chu, Jian Sun","doi":"10.1016/j.chip.2024.100100","DOIUrl":"https://doi.org/10.1016/j.chip.2024.100100","url":null,"abstract":"","PeriodicalId":100244,"journal":{"name":"Chip","volume":"9 6","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141700701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Remote electric powering by germanium photovoltaic conversion of an Erbium-fiber laser beam 通过锗光电转换铒光纤激光束实现远程供电
Chip Pub Date : 2024-06-26 DOI: 10.1016/j.chip.2024.100099
Richard Soref , Francesco De Leonardis , Oussama Moutanabbir , Gerard Daligou
{"title":"Remote electric powering by germanium photovoltaic conversion of an Erbium-fiber laser beam","authors":"Richard Soref ,&nbsp;Francesco De Leonardis ,&nbsp;Oussama Moutanabbir ,&nbsp;Gerard Daligou","doi":"10.1016/j.chip.2024.100099","DOIUrl":"10.1016/j.chip.2024.100099","url":null,"abstract":"<div><p>The commercially available 4000-Watt continuous-wave (CW) Erbium-doped-fiber laser, emitting at the 1567-nm wavelength where the atmosphere has high transmission, provides an opportunity for harvesting electric power at remote “off the grid” locations using a multi-module photovoltaic (PV) “receiver” panel. This paper proposes a 32-element monocrystalline thick-layer Germanium PV panel for efficient harvesting of a collimated 1.13-m-diam beam. The 0.78-m<sup>2</sup> PV panel is constructed from commercial Ge wafers. For incident CW laser-beam power in the 4000 to 10,000 W range, our thermal, electrical, and infrared simulations predict 660 to 1510 Watts of electrical output at the panel temperatures of 350 to 423 K.</p></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 3","pages":"Article 100099"},"PeriodicalIF":0.0,"publicationDate":"2024-06-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2709472324000170/pdfft?md5=d0ba424633e8badf6dfa158686b16e97&pid=1-s2.0-S2709472324000170-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141722083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The on-chip thermoelectric cooler: advances, applications and challenges 片上热电冷却器:进展、应用和挑战
Chip Pub Date : 2024-06-01 DOI: 10.1016/j.chip.2024.100096
Chengjun Li, Yubo Luo, Wang Li, Boyu Yang, Chengwei Sun, Wenyuan Ma, Zheng Ma, Yingchao Wei, Xin Li, Junyou Yang
{"title":"The on-chip thermoelectric cooler: advances, applications and challenges","authors":"Chengjun Li,&nbsp;Yubo Luo,&nbsp;Wang Li,&nbsp;Boyu Yang,&nbsp;Chengwei Sun,&nbsp;Wenyuan Ma,&nbsp;Zheng Ma,&nbsp;Yingchao Wei,&nbsp;Xin Li,&nbsp;Junyou Yang","doi":"10.1016/j.chip.2024.100096","DOIUrl":"10.1016/j.chip.2024.100096","url":null,"abstract":"<div><p>With the development of 5G technology and increasing chip integration, traditional active cooling methods struggle to meet the growing thermal demands of chips. Thermoelectric coolers (TECs) have garnered great attention due to their rapid response, significant cooling differentials, strong compatibility, high stability and controllable device dimensions. In this review, starting from the fundamental principles of thermoelectric cooling and device design, high-performance thermoelectric cooling materials are summarized, and the progress of advanced on-chip TECs is comprehensively reviewed. Finally, the paper outlines the challenges and opportunities in TEC design, performance and applications, laying great emphasis on the critical role of thermoelectric cooling in addressing the evolving thermal management requirements in the era of emerging chip technologies.</p></div>","PeriodicalId":100244,"journal":{"name":"Chip","volume":"3 2","pages":"Article 100096"},"PeriodicalIF":0.0,"publicationDate":"2024-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S2709472324000145/pdfft?md5=5df7bff3a72f84dd9ee90367220d271d&pid=1-s2.0-S2709472324000145-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140792827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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