IEEE open journal of power electronics最新文献

{"title":"New High Step-Up Two-Stage DC-DC Converter With Two Coupled Inductors and Switch Capacitor","authors":"Iman Soltani;Saeed Sharifi Jeze;Gholam-Reza Molaeimanesh;Hani Vahedi","doi":"10.1109/OJPEL.2026.3716161","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3716161","url":null,"abstract":"This paper presents a high-step-up DC-DC converter suitable for low-voltage source applications, such as renewable energy systems. The proposed topology integrates a two-stage structure, two coupled inductors with dual windings, and a voltage lift technique to achieve high voltage gain, continuous input current, and reduced semiconductor device voltage stress. The converter features a common ground between the input and output sides, which facilitates system integration and control. The input current is divided between the two coupled inductors, thereby limiting losses in the input-side components. Steady-state analysis of the converter was performed to determine the voltage gain, voltage stress, and component currents. Relationships relevant to the converter's design have been presented to facilitate its operation under the required conditions. Additionally, small-signal analysis was conducted to support the controller design, and the corresponding transfer functions were derived. The converter's power losses have also been calculated. Afterward, a comparison is presented between this structure and other designs in the literature to identify its advantages and disadvantages. To validate the theoretical analysis and practical feasibility, a 100-W prototype with a 200-V output voltage was implemented. The experimental results show good agreement with the theoretical predictions.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"2112-2129"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11617310","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148627552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Small-Signal Modeling and Analysis of a Grid-Forming PEM Hydrogen Electrolyzer","authors":"Basil Hamad;Yasser Abdel-Rady I. Mohamed;Ahmed Al-Durra;Ehab F. El-Saadany","doi":"10.1109/OJPEL.2026.3664032","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3664032","url":null,"abstract":"Green hydrogen production using proton exchange membrane electrolyzers (PEMELs) is increasingly integrated with renewable energy resources to enhance sustainability, storage, and grid resilience. Analyzing the stability and dynamics of such systems is complex and requires comprehensive modeling. This paper develops a detailed multiphysics small-signal model of a grid-forming PEMEL employing a unidirectional DC/DC buck converter and a bidirectional DC/AC inverter for grid integration. The model captures electrical, electrochemical, thermal, and fluid dynamics, and is validated against a nonlinear time-domain multiphysics model. Key factors affecting eigenvalues and mode shifts include stack temperature, current consumption, gas pressures, short circuit ratio (SCR), PI controller gains, and converter LC sizing. It has been demonstrated that low SCR operation can hinder system stability due to the inherently slow dynamics of PEMELs, leading to intermittent hydrogen production. Furthermore, temperature variations are shown to influence system stability conditions. The proposed model not only supports PEMEL integration in grid dynamic studies, but provides insights toward temperature and mass-flow management, highlighting the importance of detailed modeling.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"642-669"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11395268","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148484873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Fixed Switching Frequency Model Predictive Control Strategy With Reactive Power Handling Capability and Improved Current Tracking for Vienna Rectifiers","authors":"Abdul Nazer P;Harish Sudhakaran Nair","doi":"10.1109/OJPEL.2026.3663931","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3663931","url":null,"abstract":"Vienna rectifiers are widely used for high power density AC–DC conversion in applications such as electric vehicle chargers, power supplies, and industrial front-end rectifiers. The control of Vienna rectifier is challenging owing to its multi-objective control requirements, for which finite-set model predictive control (FS-MPC) is attractive. However, conventional FS-MPC suffers from variable switching frequency, while recently reported fixed switching frequency (FSF) FS-MPC methods face issues such as input current distortion, neutral-point (NP) voltage balancing challenges, and poor reactive power control capability. This paper proposes a new FSF FS-MPC algorithm that addresses these issues by introducing a modified five-segment switching sequence, which redistributes dwell time to restore reactive power handling capability and also achieves NP voltage control. Additionally, the method incorporates compensation for converter non-idealities to enhance current reference tracking. Simulation studies and experimental results from a Vienna rectifier hardware prototype validate the effectiveness of the proposed FSF FS-MPC algorithm. Comparative analysis shows that the proposed FSF FS-MPC algorithm achieves significantly reduced input current total harmonic distortion (THD), improved current tracking, NP voltage balancing, and enabled reactive power support, all while maintaining a fixed switching frequency.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"616-630"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11392823","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148486370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Online Battery Resistance Estimation Algorithm With Down-Sampling and Preprocessing Filter in Embedded DC-DC Power Converters","authors":"Mina Kim;Seung-Jong Kim;Jia Hong;Hwa-Pyeong Park","doi":"10.1109/OJPEL.2026.3653643","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3653643","url":null,"abstract":"The safety and reliability of lithium-ion batteries have become increasingly critical due to the rising risk of fire incidents in electric vehicles and energy storage systems. Among various diagnostic methods, AC internal resistance (AC-IR) has emerged as a promising metric for fault detection. While electrochemical impedance spectroscopy (EIS) offers high accuracy across a wide frequency range, it is unsuitable for real-time applications due to bulky hardware and limited cost-effectiveness. To overcome these limitations, this paper proposes an online AC-IR measurement algorithm integrated into a DC–DC converter operating under constrained digital signal processing resources. The proposed method employs a frequency-domain analysis framework with tunable down-sampling and FIR-based anti-aliasing filtering, enabling low-frequency impedance estimation with enhanced resolution. This approach addresses the inherent limitations in frequency resolution imposed by fixed sampling rates and restricted FFT size in embedded systems. The algorithm is experimentally validated using a 50-W bidirectional DC–DC converter and a lithium-ion battery, achieving less than 1.34% error compared to a commercial EIS device over the frequency range of 6.5 Hz to 990.5 Hz.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"295-304"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11347470","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148486579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Single-Sensor Inverter-Side Current Feedback With Band-Pass-Filter Active Damping for Robust Control of LCL Grid-Connected Inverters Under Weak-Grid Conditions","authors":"Youssef Lamkharbach;Jérôme Cros;Ahmed Chebak","doi":"10.1109/OJPEL.2026.3717502","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3717502","url":null,"abstract":"LCL-filtered grid-connected voltage-source inverters provide excellent switching-harmonic attenuation, but their resonant dynamics combined with digital delays can destabilize conventional current control. This paper proposes a single-sensor inverter-side current-feedback (ICF) scheme that achieves accurate current regulation and active damping using only the inverter-side current sensor already required for overcurrent protection, with no additional capacitor or grid-current sensor. Unlike constant-gain ICF approaches restricted to <inline-formula><tex-math>${{f}_r} &lt; {{f}_s}/6$</tex-math></inline-formula>, an adaptive-frequency multi quasi-proportional–resonant (AMQ-PR) controller is combined with a band-pass-filter-based active damping (BPF-AD) path discretized using Tustin, enabling stable operation beyond <inline-formula><tex-math>${{f}_s}/6$</tex-math></inline-formula> toward <inline-formula><tex-math>${{f}_s}/3$</tex-math></inline-formula>. The Tustin discretization of BPF-AD introduces a zero at z = −1 (Nyquist), driving the gain <inline-formula><tex-math>$ - infty $</tex-math></inline-formula> dB at <inline-formula><tex-math>$omega = pi /{{T}_s}$</tex-math></inline-formula> and providing inherent high-frequency noise rejection superior to constant gain and high-pass-filter-based schemes. The BPF emulates a virtual impedance with positive equivalent resistance in the resonance region, whose parameters <inline-formula><tex-math>$( {zeta,{{K}_D}} )$</tex-math></inline-formula> are selected by maximizing the effective damping factor <inline-formula><tex-math>${{zeta }_{text{LCL}}}$</tex-math></inline-formula> while enforcing an inner-loop stability bound on <inline-formula><tex-math>${{K}_D}( zeta )$</tex-math></inline-formula>, directly defining a practical stable design region. Resonant gains are designed from the sensitivity function and closed-loop stability is verified in the z-domain via pole trajectories, proportional-gain limits, and robustness to grid-inductance variations up to <inline-formula><tex-math>${{L}_g} = 11 mH ( {SCR approx 3} )$</tex-math></inline-formula>. Experiments on a single-phase prototype confirm fast current tracking, effective resonance suppression for <inline-formula><tex-math>${{f}_r} &gt; {{f}_s}/6$</tex-math></inline-formula>, and current THD reduction from 11% to 2.9% under a severely distorted weak grid with 15% voltage THD.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"2271-2287"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11626055","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148746807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Erratum to “A Unified Digital State-Feedback Control Strategy With Explicit Decoupling for a Hybrid Multiport DC–AC Converter in Standalone PV-HESS Applications”","authors":"Diego Rojas;Duberney Murillo-Yarce;Abraham López;Javier Muñoz;Patricio Gaisse","doi":"10.1109/OJPEL.2026.3724130","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3724130","url":null,"abstract":"This addresses errors in [1]. Due to a production error, the matrix (13) and (14) are not displayed correctly.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"2573-2573"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11685906","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148925405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Planar Integrated Magnetics Technology — A Review","authors":"Sreejith Chakkalakkal;Ali Emadi","doi":"10.1109/OJPEL.2026.3719252","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3719252","url":null,"abstract":"This article reviews the fundamental design principles and emerging technology trends of planar magnetics and magnetic integration in modern electrification. A physics-grounded overview is presented, establishing a hierarchical taxonomy and examining the role of magnetic integration across automotive, renewable-energy, data-center, and aerospace applications. The review emphasizes the physical intuition and mechanisms governing planar transformer–inductor integration, while evaluating the key geometric and implementation tradeoffs of modern planar architectures using literature-based quantitative benchmarks. Furthermore, key design considerations—including high-frequency distributed effects under wide-bandgap (WBG) excitation, parasitic capacitance, electromagnetic compatibility (EMC), thermal management, insulation coordination, partial discharge (PD), dielectric reliability, and manufacturability—are addressed as coupled constraints inherent to high-density planar structures. Finally, the article outlines current commercial trajectories and future research frontiers, providing design-oriented guidance for the development of more compact, efficient, and reliable power converters.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"2327-2351"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11636236","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148781323","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"State-of-the-Art Power Electronics in AI Data Centers","authors":"Surya Elangovan;Yi-Chia Chiu;Tejender Singh Rawat;Susmita Mistri;Aji Nurohman;Shivendra Kumar Singh;Yi-Kai Hsiao;Li-Yin Chen;Tian-Li Wu;Chang-Ching Tu;Hao-Chung Kuo","doi":"10.1109/OJPEL.2026.3720942","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3720942","url":null,"abstract":"The rapid scaling of artificial intelligence (AI) workloads is driving a fundamental redesign of the data center power-delivery chain, from the utility grid to the processor die. This review paper presents a stage-by-stage technical benchmarking of state-of-the-art power electronics across the four key conversion stages that define this chain: the power supply unit (PSU), the high-voltage intermediate bus converter (HV IBC), the on-board low-voltage intermediate bus converter (LV IBC) and voltage regulator module (VRM), and the wide-bandgap (WBG) semiconductor devices that enable each stage. For the conventional AC-distributed architecture, totem-pole power factor correction (PFC) and LLC resonant converter topologies are benchmarked across the 3–12 kW power range. The analysis identifies the component-scaling limitations that constrain PSU power density and motivate the transition toward high-voltage direct-current (HVDC) distribution. For the emerging 800 V HVDC architecture, input-series-output-parallel (ISOP)-based GaN LLC converters are shown to achieve power densities exceeding 20 times those of conventional PSUs while maintaining comparable efficiency. In addition, fault-protection challenges unique to DC distribution are systematically analyzed. At the board level, LV IBC, VRM, and direct 48 V-to-point-of-load (PoL) conversion architectures are comparatively evaluated in terms of efficiency, power density, transient response, and thermal performance. This evaluation establishes a topology-to-performance mapping and provides a structured comparison between conventional two-stage and emerging single-stage power-delivery architectures. At the device level, commercial 1200 V SiC MOSFETs are benchmarked against 650 V GaN HEMTs for HVDC applications, while low-voltage Si MOSFETs are compared with 15–100 V GaN HEMTs for board-level conversion stages. Key figures of merit, including Ron×Qg, package area, current density, and cost per ampere, are used to quantify where wide-bandgap technologies have surpassed silicon and where challenges related to cost, current capability, and packaging maturity continue to limit adoption. By consolidating circuit-level and device-level benchmarks within a unified grid-to-chip framework, this review identifies the dominant efficiency–power density–voltage–cost tradeoffs across each conversion stage and provides insights into the development of a scalable, high-density power-delivery ecosystem for next-generation AI server racks .","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"2434-2463"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11643848","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148781327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Investigating Failure Mechanisms in DC Hybrid Switchgear Through a Methodical Evaluation of Critical Faults","authors":"Arno Bernhardt;Matthias Streck;Johannes Gehring;Jochen Schuster;Julian Kaiser;Maximilian Kraus;Christoph Oehler;Dieter Volm;Ann-Cathrin Uhr-Müller;Sebastian Gerke;Marlon Roche;Rainer Durth;Christian Hoyer;Jens Schönau;Frank Berger;Vincent Lorentz;Martin März","doi":"10.1109/OJPEL.2026.3727057","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3727057","url":null,"abstract":"For safe and reliable DC Distribution systems, appropriate switchgear are key elements. Hybrid switchgear technology has the potential to satisfy the requirements of these prospective DC systems. This paper contributes to the improvement the design of these switchgear by providing information on increasing the reliability and safety of hybrid switchgear as a basis for the design and development process. This is achieved by a proprietary failure analysis method based on an FMEA. The developed methodology is presented and applied to a generic parallel structure of a hybrid DC switchgear as an example. A total of more than 60 failure modes are identified and evaluated. The formation of the most critical faults in three of the functional groups are investigated experimentally. One key aspect is the reproducibility of fault formation. With this, the previous theoretical considerations are verified. Furthermore, the effects, detection approaches and possible mitigation measures of these failure modes are provided.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"2621-2640"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11664357","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149033885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Monolithic GaN Half-Bridge With High-Speed Auto-Zero Comparator and Bidirectional Level Shifting","authors":"Jan Grobe;Ralf Wunderlich;Stefan Heinen","doi":"10.1109/OJPEL.2026.3737239","DOIUrl":"https://doi.org/10.1109/OJPEL.2026.3737239","url":null,"abstract":"This paper presents a monolithically integrated GaN half-bridge with all auxiliary high-speed and high-voltage circuits required for resonant converter applications. It integrates two 650 V power transistors and slew rate limiting gate drivers with 7.2 ns delay, achieving a peak 65% <inline-formula><tex-math>$dV/dt$</tex-math></inline-formula> reduction with minimal additional delay by using a non-linear output impedance. The integrated level shifters enable bidirectional level shifting between high- and low-side domains with common-mode transient immunity values above 100 V ns<inline-formula><tex-math>$^{-1}$</tex-math></inline-formula>. An integrated auto-zero comparator with 23 ns delay and 400 <inline-formula><tex-math>$mu$</tex-math></inline-formula>V offset enables low-noise, high-precision current control with an integrated sense-FET. High-speed reverse conduction and de-saturation detection are enabled by a shared drain-voltage limiter circuit. The components are verified in a 3505 V resonant buck converter system, requiring only a purely digital external controller, and fabricated in a 650 V GaN-on-Silicon-on-Insulator technology.","PeriodicalId":93182,"journal":{"name":"IEEE open journal of power electronics","volume":"7 ","pages":"2817-2829"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11707659","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"149188861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}