{"title":"Assessment of PSpice model for commercial SiC MOSFET power modules","authors":"D. Johannesson, M. Nawaz","doi":"10.1109/WIPDA.2015.7369257","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369257","url":null,"abstract":"In this paper, a circuit level simulation model for SiC MOSFET power modules has been assessed. The static and dynamic characteristics of a 1.2 kV 800 A SiC MOSFET power module has been measured, simulated and verified in the PSpice circuit simulation platform. The SiC MOSFET power module is evaluated in two case studies, first where the power module is treated as a single device (simulated with one sub-module) and secondly where the performance of the power module is simulated as multiple MOSFET chips in parallel (multiple sub-modules). Here, the bond-wires between the chips are also included as inductive elements. The simulated static characteristics of the SiC MOSFET power module are well aligned with the measured data. In the first case, the simulation model in PSpice shows accurate dynamic performance overall, with exceptions from high-frequency oscillations that arises during turn-on and turn-off. The second case study shows that the oscillations can be captured by introducing multiple MOSFET chips in parallel and where the bond-wires in between are represented by inductors. A slight increase of high-frequency oscillations is noticed but on the cost of reduced simulation robustness (e.g. convergence issues) due to a more complex simulation circuit. Finally, it is concluded that the simulation model performance is overall accurate, both for static and dynamic performance. Further, the model is capable to estimate on-state loss and switching loss in a satisfactory manner and is utilized to evaluate and optimize power electronic converter cell parameters, for instance stray inductance, gate resistance and temperature, and their impact on converter energy loss.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"3 1","pages":"291-295"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85280158","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Package influence on the simulated performance of 1.2 kV SiC modules","authors":"Zichen Miao, Yincan Mao, K. Ngo, Woochan Kim","doi":"10.1109/WIPDA.2015.7369301","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369301","url":null,"abstract":"Power modules with well-behaved terminal waveforms could still have their dice suffering from false triggering. Immunities to false triggering and current unbalance, and switching energy of four commercial 1.2 kV SiC modules (modules A, B, C, and D) are compared by studying the simulated channel current of each MOSFET die in the presence of packages' parasitic impedances. For module B, gate inductance and Kelvin-source inductance of the low-side switch reaches 111 nH and 103 nH, respectively, and 15 Ω gate resistor is added inside the module to mitigate the false triggering. For modules A, B, and C, cross(talk-induced) turn-on are noticed internally even though terminal waveforms look normal. Module C switches with severe current unbalance and cross-turn-on because of asymmetry in the layout of its power loop. Module D's symmetrical layout suppresses current unbalance and cross-turn-on at the expense of switching energy, which is the largest among the modules.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"36 1","pages":"306-311"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86667303","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Juncheng Lu, Hua Bai, S. Averitt, Di Chen, J. Styles
{"title":"An E-mode GaN HEMTs based three-level bidirectional DC/DC converter used in Robert Bosch DC-grid system","authors":"Juncheng Lu, Hua Bai, S. Averitt, Di Chen, J. Styles","doi":"10.1109/WIPDA.2015.7369254","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369254","url":null,"abstract":"Instead of using 1200V SiC MOSFETs for the >600V applications, this paper utilized 650V E-mode GaN HEMTs to build a three-level DC/DC converter. The DC-bus voltage is 800V, the output voltage of 380V and the power is 2.5kW with the bidirectional power-flow capability. Simulation and experimental results show that such design strategy is superior to a single 1200V SiC MOSFET based DC/DC converter in terms of the switching and conduction performance. On the other hand, in order to better understand the performance of GaN HEMTs, hard-switching technology is used to fully test the switching behaviors. Two GaN HEMTs are in parallel to enhance the power capability, which requires the special focus on the parasitic parameters. The effects of parasitics especially the stray inductance in the commutation loop and the gate-drive loop during switching transitions have been comprehensively analyzed and discussed in this paper.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"64 1","pages":"334-340"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77941683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An optimized gate-loop layout for multi-chip SiC MOSFET power modules","authors":"Miao Wang, F. Luo, Longya Xu","doi":"10.1109/WIPDA.2015.7369279","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369279","url":null,"abstract":"This paper investigates the impact of gate-loop layouts on the switching loss of a multi-chip silicon carbide metal-oxide-semiconductor field-effect-transistor (MSOFET) power module. Six gate loop layouts are proposed and evaluated in switching simulations. A 16.2% difference on the total switching loss is observed between a good and a bad gate loop layout. The results shows that the total switching loss can be reduced with a \"reverse matching arrangement\" between the gate loop and the power loop. Specifically, to assign a short gate loop to the device that has a large power-loop inductance, and vice versa. In addition, shared traces from the gate driver to the paralleled devices could further reduce the total switching loss.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"26 1","pages":"215-219"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75606122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Risbud, K. Pedrotti, M. Power, J. Pomeroy, Martin Kuball
{"title":"Thermal characterization of high voltage GaN-on-Si Schottky Barrier Diodes (SBD) for designing an on-chip thermal shutdown circuit for a power HEMT","authors":"D. Risbud, K. Pedrotti, M. Power, J. Pomeroy, Martin Kuball","doi":"10.1109/WIPDA.2015.7369293","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369293","url":null,"abstract":"Thermal characterization of large multi-finger AlGaN/GaN Schottky Barrier Diodes (SBDs) fabricated on GaN-on-Si high voltage power substrates is reported. An accurate thermal model was developed for the device structure to estimate the device temperature near the 2-DEG in HEMT switches for various power densities. Raman thermography and infrared imaging were used under DC bias conditions for temperature measurement and mapping of heat distribution in the devices. Temperature rise vs. power density, and temperature rise vs. device area are presented. The assumption of uniform temperature distribution throughout the channel holds well for smaller power devices typically used in microwave and RF circuits. However, for the substantially larger high voltage power diodes and HEMTs used in automotive, power conversion and motor drive applications, the temperature distribution is not homogeneous from the center of the die to the outer edge. Detailed knowledge of the temperature distribution across the die is essential for system level thermal management. Thermal simulation, characterization results and the temperature coefficient of the sense SBD are used to design a novel self-protecting thermal shutdown circuit integrated with a discrete 600V power HEMT.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"43 1","pages":"156-161"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89762897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Dimarino, Wenli Zhang, R. Burgos, D. Boroyevich
{"title":"Design of a high-density, diode-less 1.2 kV, 90 A SiC MOSFET half-bridge power module","authors":"C. Dimarino, Wenli Zhang, R. Burgos, D. Boroyevich","doi":"10.1109/WIPDA.2015.7369278","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369278","url":null,"abstract":"SiC devices with current ratings close to 100 A per chip have recently been released. These devices decrease the number of paralleled die needed in high-current power modules, thus increasing power density. By utilizing these devices in synchronous operation with the body diode used for dead time commutation, the external antiparallel diode can be eliminated. This mode reduces cost, and further increases the power density without sacrificing efficiency. In this work, a 1.2 kV, 90 A diode-less SiC MOSFET half-bridge module was designed, fabricated and tested. A survey of packaging materials and technologies was conducted, and the selections were based on the tradeoff between cost and performance. The fabricated module has low gate- and power-loop parasitic inductances (3 and 2.4 nH, respectively), and has more than twice the power density (7.8 W/mm3) and less than half of the switching loss (1.3 mJ) as similarly-rated commercial half-bridge modules.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"59 1","pages":"210-214"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85846302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
I. Ji, Bongmook Lee, Sizhen Wang, V. Misra, A. Huang
{"title":"A new AlGaN/GaN power HFET employing partial deep trench drain structure for high voltage application","authors":"I. Ji, Bongmook Lee, Sizhen Wang, V. Misra, A. Huang","doi":"10.1109/WIPDA.2015.7369277","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369277","url":null,"abstract":"A new AlGaN/GaN heterojuction field effect transistor (HFET) employing the partial deep trench drain structure for high voltage application has been proposed and verified successfully to achieve low leakage current and small Rdson. In order to reduce leakage current and on-resistance of HFET devices, we propose a partial deep trench on drain edge adjacent to access region for the first time, which contributes to reducing the surface electric field under the off-state. In addition, trenched area under drain Ohmic metal enhances Ohmic contact on the surface of AlGaN layer which reduces contact resistivity of drain Ohmic contact. The proposed deep trench drain successfully reduces Ohmic contact resistance under the on-state and leakage current under the off-state at the same time.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"101 1","pages":"147-149"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85901601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Kyung-Hwan Lee, Euihoon Chung, Gab-Su Seo, Jung-Ik Ha
{"title":"Design of GaN transistor-based class E DC-DC converter with resonant rectifier circuit","authors":"Kyung-Hwan Lee, Euihoon Chung, Gab-Su Seo, Jung-Ik Ha","doi":"10.1109/WIPDA.2015.7369269","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369269","url":null,"abstract":"This paper proposes a novel design of class E dc-dc converter with a resonant rectifier circuit. Class E converter is advantageous in several-MHz switching since it achieves zero voltage switching (ZVS) and has the single ground-referenced switch. In this paper, the resonant rectifier is used to construct a dc-dc converter in conjunction with the class E inverter instead of the conventional rectifiers such as a half-wave rectifier and a full-wave bridge rectifier. The main benefit of the resonant rectifier is that the rectifier diode turns on and off at low dv/dt, thereby reducing switching loss and noise mainly attributed to the parasitic inductance and capacitance. Here we focus on the analysis and design of the resonant rectifier and analytically find the condition that the rectifier circuit can be seen as a resistor. Compared to other studies, the proposed design of the rectifier requires no large filter inductor. Also, its resonant frequency differs from the fundamental frequency, allowing the rectifier to be resistive. A 6.78-MHz prototype converter is implemented by using an enhancement-mode GaN FET, and experimental results validate the proposed design scheme.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"53 1","pages":"275-280"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90825888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
He Li, Chengcheng Yao, Chaoran Han, J. Brothers, Xuan Zhang, Jin Wang
{"title":"Evaluation of 600 V GaN based gate injection transistors for high temperature and high efficiency applications","authors":"He Li, Chengcheng Yao, Chaoran Han, J. Brothers, Xuan Zhang, Jin Wang","doi":"10.1109/WIPDA.2015.7369300","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369300","url":null,"abstract":"In this paper, we present a comprehensive evaluation of the latest 600 V class Gallium Nitride based Gate Injection Transistor (GaN-GIT) for high temperature and high efficiency applications. In this study, the Panasonic GITs are used as the reference for latest GaN-GIT technology. Static and dynamic testing was performed on the two GaN-GIT versions to extract critical static parameters and switching losses. A curve tracer was used to measure the gate-to-source threshold value and static Rds(on) across the full operating temperature range. A double pulse setup was developed to test the devices switching time and hard-switching loss. The switching performance is temperature insensitive. Then, the dynamic on-resistance of the GaN-GIT was measured with an additional clamping circuit. Finally, an improved gate drive circuit for the GaN-GIT was proposed and validated to achieve MHz operation with smaller switching loss.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"8 1","pages":"85-91"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81959966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Experimental performance comparison of six-pack SiC MOSFET and Si IGBT modules paralleled in a half-bridge configuration for high temperature applications","authors":"R. Lund, S. Tiwari, O. Midtgård, Tore Undeland","doi":"10.1109/WIPDA.2015.7369260","DOIUrl":"https://doi.org/10.1109/WIPDA.2015.7369260","url":null,"abstract":"The switching performance of a six-pack SiC MOSFET module (CCS050M12CM2) is investigated experimentally using a standard double pulse test method. The upper three and the lower three MOSFETs of the CCS050M12CM2 are paralleled forming a half-bridge configuration. Moreover, the performance comparison of the CCS050M12CM2 is carried out with a pin to pin compatible Si IGBT module (FS75R12KT4_B15) of the same rating. Thus, switching and driving energy losses can be compared fairly. Laboratory results show that CCS050M12CM2 switches much faster compared to FS75R12KT4_B15 provided the same gate resistor is used. The measured total driving and switching energy losses are approximately 4 times in FS75R12KT4_B15 compared to CCS050M12CM2 at 25 °C. Moreover, the total switching energy loss is nearly independent of the temperature for CCS050M12CM2, whereas, FS75R12KT4_B15 has 1.6 times higher switching energy loss at a junction temperature of 175° C compared to 25 °C.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"2015 1","pages":"135-140"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87095919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}