C. Dimarino, Wenli Zhang, R. Burgos, D. Boroyevich
{"title":"高密度、无二极管1.2 kV、90a SiC MOSFET半桥功率模块的设计","authors":"C. Dimarino, Wenli Zhang, R. Burgos, D. Boroyevich","doi":"10.1109/WIPDA.2015.7369278","DOIUrl":null,"url":null,"abstract":"SiC devices with current ratings close to 100 A per chip have recently been released. These devices decrease the number of paralleled die needed in high-current power modules, thus increasing power density. By utilizing these devices in synchronous operation with the body diode used for dead time commutation, the external antiparallel diode can be eliminated. This mode reduces cost, and further increases the power density without sacrificing efficiency. In this work, a 1.2 kV, 90 A diode-less SiC MOSFET half-bridge module was designed, fabricated and tested. A survey of packaging materials and technologies was conducted, and the selections were based on the tradeoff between cost and performance. The fabricated module has low gate- and power-loop parasitic inductances (3 and 2.4 nH, respectively), and has more than twice the power density (7.8 W/mm3) and less than half of the switching loss (1.3 mJ) as similarly-rated commercial half-bridge modules.","PeriodicalId":6538,"journal":{"name":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"59 1","pages":"210-214"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"Design of a high-density, diode-less 1.2 kV, 90 A SiC MOSFET half-bridge power module\",\"authors\":\"C. Dimarino, Wenli Zhang, R. Burgos, D. Boroyevich\",\"doi\":\"10.1109/WIPDA.2015.7369278\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"SiC devices with current ratings close to 100 A per chip have recently been released. These devices decrease the number of paralleled die needed in high-current power modules, thus increasing power density. By utilizing these devices in synchronous operation with the body diode used for dead time commutation, the external antiparallel diode can be eliminated. This mode reduces cost, and further increases the power density without sacrificing efficiency. In this work, a 1.2 kV, 90 A diode-less SiC MOSFET half-bridge module was designed, fabricated and tested. A survey of packaging materials and technologies was conducted, and the selections were based on the tradeoff between cost and performance. The fabricated module has low gate- and power-loop parasitic inductances (3 and 2.4 nH, respectively), and has more than twice the power density (7.8 W/mm3) and less than half of the switching loss (1.3 mJ) as similarly-rated commercial half-bridge modules.\",\"PeriodicalId\":6538,\"journal\":{\"name\":\"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)\",\"volume\":\"59 1\",\"pages\":\"210-214\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WIPDA.2015.7369278\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 3rd Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WIPDA.2015.7369278","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a high-density, diode-less 1.2 kV, 90 A SiC MOSFET half-bridge power module
SiC devices with current ratings close to 100 A per chip have recently been released. These devices decrease the number of paralleled die needed in high-current power modules, thus increasing power density. By utilizing these devices in synchronous operation with the body diode used for dead time commutation, the external antiparallel diode can be eliminated. This mode reduces cost, and further increases the power density without sacrificing efficiency. In this work, a 1.2 kV, 90 A diode-less SiC MOSFET half-bridge module was designed, fabricated and tested. A survey of packaging materials and technologies was conducted, and the selections were based on the tradeoff between cost and performance. The fabricated module has low gate- and power-loop parasitic inductances (3 and 2.4 nH, respectively), and has more than twice the power density (7.8 W/mm3) and less than half of the switching loss (1.3 mJ) as similarly-rated commercial half-bridge modules.