半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001567

C.H. Li, K. Tu, H. Chu, I.H. Chang, W.R. Liaw, H.F. Lee, W. Lien, M. Tsai, W. Liang, W.G. Yeh, H. Chou, C.Y. Chen, M.H. Chi

{"title":"A robust shallow trench isolation (STI) with SiN pull-back process for advanced DRAM technology","authors":"C.H. Li, K. Tu, H. Chu, I.H. Chang, W.R. Liaw, H.F. Lee, W. Lien, M. Tsai, W. Liang, W.G. Yeh, H. Chou, C.Y. Chen, M.H. Chi","doi":"10.1109/ASMC.2002.1001567","DOIUrl":"https://doi.org/10.1109/ASMC.2002.1001567","url":null,"abstract":"In this paper, the effect of SiN pull-back process for shallow trench isolation (STI) is investigated by measuring DRAM array's refresh time (Tref) and yield as sensitive monitors. The SiN pull-back is performed by using H/sub 3/PO/sub 4/ solution after trench etch (i.e. before liner oxidation). For comparison, DRAMs were fabricated by using various isolation methods including LOCOS, conventional STI, and poly-buffered STI (PB-STI). The SiN pull-back process is known for reducing \"divot\" around the top comer in conventional STI. Both LOCOS and PB-STI can result in \"divot\" free. It is also known that \"divot\" will degrade the inverse narrow width effect of pass transistor and result in \"double hump\". In our study, SiN pull-back in STI indeed eliminates \"double-hump\" in I/sub d/-V/sub g/ curves of pass transistors. The SiN pull-back also can result in better data retention of DRAM than if without pull-back, but comparable to LOCOS and PB-STI. The optimized window of SiN pull-back in this study is 10 nm to 40 nm with best yield at 15 nm (slightly better yield than LOCOS and PB-STI).","PeriodicalId":64779,"journal":{"name":"半导体技术","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84435362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 12

Characterization of copper voids in dual damascene processes 双大马士革工艺中铜空洞的表征

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001632

R. Guldi, J. Shaw, J. Ritchison, S. Oestreich, K. Davis, R. Fiordalice

引用次数: 15

Accuracy of yield impact calculation based on kill ratio 基于杀伤比的产量冲击计算的准确性

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001580

M. Ono, H. Iwata, K. Watanabe

引用次数: 2

Data acquisition approach for real-time equipment monitoring and control 用于设备实时监控的数据采集方法

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001608

G. Baweja, B. Ouyang

引用次数: 6

Semiconductor fab maintenance challenge and BKM in downturn economy 低迷经济下半导体工厂维护挑战与BKM

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001609

T. Massie

引用次数: 0

Yield prediction using critical area analysis with inline defect data 利用关键区域分析和内联缺陷数据进行良率预测

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001579

C. Zhou, R. Ross, C. Vickery, B. Metteer, S. Gross, D. Verret

引用次数: 18

Wafer level packaging and 3D interconnect for IC technology 集成电路技术的晶圆级封装和3D互连

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001606

R. Islam, C. Brubaker, P. Lindner, C. Schaefer

引用次数: 9

Equipment productivity improvement via inline qualification implementation 通过在线认证的实施来提高设备的生产效率

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001607

N. Lafferty, B. Fiol, P. Jowett, Y. Karzhavin, T. Urenda

引用次数: 1

Robust optimization of experimental designs in microelectronics processes using a stochastic approach 使用随机方法的微电子过程实验设计鲁棒优化

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001601

F. Pasqualini, E. Josse

{"title":"Robust optimization of experimental designs in microelectronics processes using a stochastic approach","authors":"F. Pasqualini, E. Josse","doi":"10.1109/ASMC.2002.1001601","DOIUrl":"https://doi.org/10.1109/ASMC.2002.1001601","url":null,"abstract":"Design of Experiments (DOE) is a structured approach widely used in the Microelectronics industry for over 20 years to study physical phenomena with simultaneous factors and responses. Today this methodology is in daily use to optimize process and products. With this in mind most DOE software's available on the market introduced since around five years ago have included the Desirability functions of Derringer (1980). Desirability functions permit the optimization simultaneously of several characteristics in the same experimental space. This first step in multi-response optimization was absolutely essential for industrial use of DOE, but this approach's weakness is that it is based on a deterministic optimization model. The provided optimum does not guarantee the robustness of the solution because it does not take into account uncertainty on factors and Response model coefficients. For this reason we are deploying at STMicroelectronics a multi-response optimization solution based on a stochastic approach of optimum's research. It takes into account uncertainty on factors and on coefficients of all the response models. The obtained solution provides a distribution function for the optimized criteria, which permits us to appreciate the statistically determined robustness. The different steps of optimization will be detailed. An example of application, for an advanced metal etch process in 0.18 /spl mu/m technology, will be presented. This permits us to point out the contribution of the stochastic solution to the process robustness and to compare it to the deterministic solution. In this example, the localization between optimums was different in the experimental space. The two solutions were tested and the physical results concluded that the better prediction was obtained with the stochastic optimum. The retained solution for industrialization was obviously the stochastic optimum.","PeriodicalId":64779,"journal":{"name":"半导体技术","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85314803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Neural network modeling of reactive ion etching using principal component analysis of optical emission spectroscopy data 基于发射光谱数据主成分分析的反应性离子蚀刻神经网络建模

半导体技术 Pub Date : 2002-08-07 DOI: 10.1109/ASMC.2002.1001643

S.J. Hong, G. May

引用次数: 9

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