R. Guldi, J. Shaw, J. Ritchison, S. Oestreich, K. Davis, R. Fiordalice
{"title":"双大马士革工艺中铜空洞的表征","authors":"R. Guldi, J. Shaw, J. Ritchison, S. Oestreich, K. Davis, R. Fiordalice","doi":"10.1109/ASMC.2002.1001632","DOIUrl":null,"url":null,"abstract":"The introduction of copper dual Damascene processing into integrated circuits has brought about a host of new defectivity issues, especially those related to pitting and voiding. These defects must be understood and eliminated to achieve competitive manufacturing yields and assure device reliability.","PeriodicalId":64779,"journal":{"name":"半导体技术","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"Characterization of copper voids in dual damascene processes\",\"authors\":\"R. Guldi, J. Shaw, J. Ritchison, S. Oestreich, K. Davis, R. Fiordalice\",\"doi\":\"10.1109/ASMC.2002.1001632\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The introduction of copper dual Damascene processing into integrated circuits has brought about a host of new defectivity issues, especially those related to pitting and voiding. These defects must be understood and eliminated to achieve competitive manufacturing yields and assure device reliability.\",\"PeriodicalId\":64779,\"journal\":{\"name\":\"半导体技术\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"半导体技术\",\"FirstCategoryId\":\"1087\",\"ListUrlMain\":\"https://doi.org/10.1109/ASMC.2002.1001632\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"半导体技术","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.1109/ASMC.2002.1001632","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Characterization of copper voids in dual damascene processes
The introduction of copper dual Damascene processing into integrated circuits has brought about a host of new defectivity issues, especially those related to pitting and voiding. These defects must be understood and eliminated to achieve competitive manufacturing yields and assure device reliability.