IEEE Embedded Systems Letters最新文献_第4页

A Multiplier-Free Discrete Cosine Transform Architecture Using Approximate Full Adder and Subtractor 使用近似全加法器和减法器的无乘法器离散余弦变换架构

IF 1.6 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-05-01 DOI: 10.1109/les.2024.3395900

Elham Esmaeili, Nabiollah Shiri, Mahmood Rafiee, Ayoub Sadeghi

引用次数: 0

LoRa, Sigfox, and NB-IoT: An Empirical Comparison for IoT LPWAN Technologies in the Agribusiness LoRa、Sigfox 和 NB-IoT：农业综合企业物联网 LPWAN 技术的经验比较

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-04-29 DOI: 10.1109/LES.2024.3394446

Juan Pablo Becoña;Marcel Grané;Matías Miguez;Alfredo Arnaud

引用次数: 0

Improving Netlist Transformation-Based Approximate Logic Synthesis Through Resynthesis 通过重合成改进基于网表转换的近似逻辑合成

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-04-18 DOI: 10.1109/LES.2024.3391220

Roger Morales-Monge;Jorge Castro-Godínez;Guilherme Paim

引用次数: 0

Self-Tuning Model for Energy-Context Optimization in Perpetual Sensor Nodes Within IoT-Integrated Hydroponic Systems 物联网集成水栽系统中永久传感器节点的能量情境优化自调整模型

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-04-10 DOI: 10.1109/LES.2024.3387310

A. Hernández-Benítez;J. Vázquez-Castillo;Johan J. Estrada-López;G. Becerra-Nunez;N. Cólin-García;A. Castillo-Atoche

{"title":"Self-Tuning Model for Energy-Context Optimization in Perpetual Sensor Nodes Within IoT-Integrated Hydroponic Systems","authors":"A. Hernández-Benítez;J. Vázquez-Castillo;Johan J. Estrada-López;G. Becerra-Nunez;N. Cólin-García;A. Castillo-Atoche","doi":"10.1109/LES.2024.3387310","DOIUrl":"10.1109/LES.2024.3387310","url":null,"abstract":"Hydroponic farming is a promising alternative to soil-based farming. However, it requires a precise control of the growth environment, which is hard to achieve with energy-constrained embedded systems. This letter presents an energy optimization technique for the continuous operation of energy harvesting-based hydroponics sensor nodes. The proposed technique is based on the self-tuning model, that dynamically adjust the duty cycle of the node, ensuring the autonomous operation of the Internet of Things system. The model can be programmed in a low-power microcontroller, allowing the decision-making process to reside entirely on the sensor node. Experimental results show that in the same time period, the self-tuning model allows \u0000<inline-formula> <tex-math>$3.5times $ </tex-math></inline-formula>\u0000 more data transmissions than a uniform 5-min duty cycle, while ensuring a minimum voltage level in the storage device. This balance allows the stored energy to be enough for continuous monitoring, providing a clean and cost-effective alternative to perpetually power the hydroponic system.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 3","pages":"267-270"},"PeriodicalIF":1.7,"publicationDate":"2024-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140569027","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Automated Parasite Control System Prototype Through Capsule Dosage Based on Image Processing 基于图像处理的胶囊剂量寄生虫自动控制系统原型

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-04-08 DOI: 10.1109/LES.2024.3386336

Ezequiel Carbajo;Lucas Leiva;Juan Toloza;Martín Vázquez;Silvina Fernández;Federica Sagües;Milagros Junco;Inés Guerrero;Sara Zegbi;Carlos Saumell

引用次数: 0

FPGA-Based Digital Taylor–Fourier Transform 基于 FPGA 的数字泰勒-傅里叶变换

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-04-03 DOI: 10.1109/LES.2024.3384843

Gerardo Avalos-Almazan;Sarahi Aguayo-Tapia;Jose De Jesus Rangel-Magdaleno;Victor Aviña-Corral

引用次数: 0

IEEE Embedded Systems Letters Publication Information IEEE Embedded Systems Letters 出版信息

IF 1.6 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-03-29 DOI: 10.1109/LES.2024.3376048

引用次数: 0

Impulsive Noise Estimator With Minimization Methods (INEMM) on Software 软件上的最小化方法脉冲噪声估计器 (INEMM)

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-03-27 DOI: 10.1109/LES.2024.3382615

Lucas A. Rabioglio;M. C. Cebedio;L. Arnone;L. De Micco;J. Castiñeira Moreira

引用次数: 0

An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits 用于数字集成电路动态功率估算的高效 VCD 解析器

IF 1.6 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-03-25 DOI: 10.1109/les.2024.3380048

Xin Zheng, Shaofen Zeng, Yongfeng Zhong, Chenyu Huang, Xianghong Hu, Xiaoming Xiong

引用次数: 0

New Compact Finite-Field Arithmetic Circuits Over GF(p) Based on Spiking Neural P Systems With Communication on Request Implemented in a Low-Cost FPGA 基于尖峰神经 P 系统的新型 GF(p) 紧凑型有限域算术电路，可在低成本 FPGA 中按要求实现通信

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-03-13 DOI: 10.1109/LES.2024.3377180

José L. I. Rangel;Moises I. Arroyo;Eduardo Vázquez;Juan G. Avalos;Giovanny Sanchez

{"title":"New Compact Finite-Field Arithmetic Circuits Over GF(p) Based on Spiking Neural P Systems With Communication on Request Implemented in a Low-Cost FPGA","authors":"José L. I. Rangel;Moises I. Arroyo;Eduardo Vázquez;Juan G. Avalos;Giovanny Sanchez","doi":"10.1109/LES.2024.3377180","DOIUrl":"10.1109/LES.2024.3377180","url":null,"abstract":"Finite-field arithmetic operations are vital for the computation of complex cryptography algorithms used in several cutting-edge applications, such as side-channel attacks, authentication, and digital signatures, among others. Currently, the simulation of these algorithms exceeds the computational capabilities of conventional computing systems. This aspect becomes critical, especially when these algorithms are implemented in resource-constrained electronic appliances. In particular, the improvement of execution time in these devices generally require more area. To overcome this issue, a large number of works have been focused on the development of compact conventional binary finite-field arithmetic circuits over GF(p) since these demand a large area consumption. Inspired by neural phenomena, a new emerging branch of computer science has made intensive efforts to improve area consumption of conventional arithmetic circuits. However, the development of compact finite-field arithmetic circuits over GF(p) is a still a challenging task. In this letter, we present for the first time, the design of four new finite-field arithmetic circuits over GF(p) based on spiking neural P (SN P) systems with communication on request. In addition, we propose a neural processor to perform four new finite-field arithmetic operations over GF(p) by using the same processing core, which is not feasible with the use of conventional binary circuits since each finite-field arithmetic-binary circuit over GF(p) is implemented separately, to significantly improve the area consumption. This has mainly been achieved since the neural processor dynamically change its configuration, which is defined in terms of the connectivity and firing rules of each neuron.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 3","pages":"295-298"},"PeriodicalIF":1.7,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140128992","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0