IEEE Embedded Systems Letters最新文献

IEEE Embedded Systems Letters Publication Information IEEE嵌入式系统通讯出版信息

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2025-06-12 DOI: 10.1109/LES.2025.3564681

引用次数: 0

IEEE Embedded Systems Letters Publication Information IEEE嵌入式系统通讯出版信息

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2025-04-17 DOI: 10.1109/LES.2025.3544886

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IEEE Embedded Systems Letters Publication Information IEEE嵌入式系统通讯出版信息

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2025-02-13 DOI: 10.1109/LES.2024.3497632

引用次数: 0

HERFA: A Homomorphic Encryption-Based Root-Finding Algorithm 一种基于同态加密的寻根算法

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-12-11 DOI: 10.1109/LES.2024.3516532

Christopher Bencini;Jason Mendola;Wei He;Sunwoong Kim

{"title":"HERFA: A Homomorphic Encryption-Based Root-Finding Algorithm","authors":"Christopher Bencini;Jason Mendola;Wei He;Sunwoong Kim","doi":"10.1109/LES.2024.3516532","DOIUrl":"https://doi.org/10.1109/LES.2024.3516532","url":null,"abstract":"Edge-cloud computing architectures are exposed to significant security challenges. Although general encryption methods can mitigate some of these concerns, they require decryption to perform operations on data, exposing the data and secret keys to potential attacks. Homomorphic encryption (HE), which allows operations on encrypted data without decryption, provides an effective solution to this issue. Applying HE schemes to root-finding algorithms can expand the use of HE to a wider range of real-world applications that involve solving equations. This letter presents an adaptation of the well-known Newton’s method for use in the HE domain. Specifically, it employs a division-free approach to remove the division operation, which is not a basic HE operation. In addition, the proposed method is extended to handle a polynomial multiplicity greater than one for faster convergence. Compared to an alternative implementation that uses a numerical method for division, the proposed HE-based root-finding algorithm (HERFA) significantly reduces the number of sequential multiplications, which is a key factor limiting the feasibility of applications in the HE domain. This reduction allows HERFA to achieve faster execution speeds or higher accuracy.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"17 3","pages":"143-146"},"PeriodicalIF":1.7,"publicationDate":"2024-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144272962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Auto-OPS: A Framework for Automated Optical Probing Simulation on GDS-II Auto-OPS: GDS-II上自动光学探测仿真框架

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-12-11 DOI: 10.1109/LES.2024.3513638

Paul Flammarion;Sajjad Parvin;Frank Sill Torres;Rolf Drechsler

引用次数: 0

Optimized Inference Scheme for Conditional Computation in On-Device Object Detection 设备上目标检测条件计算的优化推理方案

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-12-09 DOI: 10.1109/LES.2024.3514920

Kairong Zhao;Yinghui Chang;Weikang Wu;Zirun Li;Hongyin Luo;Shan He;Donghui Guo

引用次数: 0

ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication 安全无人机通信中基于熵的真随机数生成的FPAA-FPGA混合架构

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-12-09 DOI: 10.1109/LES.2024.3510365

Mohamed El-Hadedy;Andrea Abelian;Kenny Lee;Benny N. Cheng;Wen-Mei Hwu

{"title":"ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication","authors":"Mohamed El-Hadedy;Andrea Abelian;Kenny Lee;Benny N. Cheng;Wen-Mei Hwu","doi":"10.1109/LES.2024.3510365","DOIUrl":"https://doi.org/10.1109/LES.2024.3510365","url":null,"abstract":"Field-programmable gate arrays (FPGAs) and field-programmable analog arrays (FPAAs) are reconfigurable circuits that enable flexible digital and analog implementations post-manufacturing. FPGAs are widely used in telecommunications, mixed-signal, and embedded systems due to their parallel processing and reconfigurability. Meanwhile, FPAAs provide flexibility for analog systems, which is crucial for modern mixed-signal processing. This letter introduces ANUBIS, a hybrid system combining FPGA and FPAA technologies to generate true random number generators (TRNGs) for secure UAV communication. Due to its reliability and cost efficiency, ANUBIS leverages a thermistor circuit as an entropy source. The FPAA amplifies the analog noise generated by the thermistor, while the FPGA digitizes and processes the signal using Von Neumann whitening (VNW) to remove bias. The ASCON hash function is applied to the whitened bitstream to generate cryptographically secure keys. These keys are utilized in a DHKE to enable secure communication via Bluetooth low energy (BLE), an ideal protocol for energy-constrained UAV applications. ANUBIS demonstrates reconfigurability, power efficiency, and ease of implementation, showcasing its potential for secure communication applications. It achieves robust randomization, setting a new standard for UAV communication security and addressing applications requiring reliable TRNG solutions. The system consumes 1.615 W in total, with 1.54 W consumed by the FPGA and 75 mW by the FPAA. Resource utilization on the PYNQ-Z1 board includes 5186 LUTs (9.75%), 549 units of memory (3.15%), and 5.5 units of BRAM (3.93%), indicating moderate resource usage with room for future enhancements. By integrating reliable analog noise harvesting with efficient digital post-processing, ANUBIS offers a novel approach to TRNG design, demonstrating the potential for broader cryptographic applications in resource-constrained environments.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"17 3","pages":"164-167"},"PeriodicalIF":1.7,"publicationDate":"2024-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144272959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Corrections to “FDPFS: Leveraging File System Abstraction for FDP SSD Data Placement” 对“FDPFS：利用文件系统抽象实现FDP SSD数据放置”的更正

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-12-09 DOI: 10.1109/LES.2024.3513852

Ping-Xiang Chen;Dongjoo Seo;Nikil Dutt

引用次数: 0

Energy-Efficient Personalized Federated Continual Learning on Edge 高效节能个性化联邦持续学习边缘

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-12-05 DOI: 10.1109/LES.2024.3439552

Zhao Yang;Haoyang Wang;Qingshuang Sun

引用次数: 0

An Explainable and Formal Framework for Hypertension Monitoring Using ECG and PPG 使用ECG和PPG监测高血压的一个可解释和正式的框架

IF 1.7 4区计算机科学

IEEE Embedded Systems Letters Pub Date : 2024-12-05 DOI: 10.1109/LES.2024.3443449

Abhinandan Panda;Ayush Anand;Srinivas Pinisetty;Partha Roop

{"title":"An Explainable and Formal Framework for Hypertension Monitoring Using ECG and PPG","authors":"Abhinandan Panda;Ayush Anand;Srinivas Pinisetty;Partha Roop","doi":"10.1109/LES.2024.3443449","DOIUrl":"https://doi.org/10.1109/LES.2024.3443449","url":null,"abstract":"An alarming increase in hypertension is a hazard to global health that poses severe implications for the body’s vital organs. To prevent serious repercussions, hypertension should be monitored continuously for early detection. It is well known that physiological signals, such as the photoplethysmogram (PPG) and electrocardiogram (ECG), carry essential information about the vitals of the human body. Considering this, numerous machine learning-based models based on ECG-PPG have been proposed for monitoring hypertension; however, such models are “non-explainable” and lack clinical interpretation. This work proposes a formal method-based runtime verification approach for hypertension monitoring using ECG and PPG sensing, which is explainable. The pulse arrival time (PAT) feature extracted using both signals is employed to implement a decision tree to infer hypertension patterns/policies defined in PAT, based on which a runtime monitor is synthesized to classify hypertension. Using the MIMIC II dataset, the proposed scheme’s performance is assessed, and the accuracy, sensitivity, and specificity are determined to be 95.7%, 93.9%, and 97.6%, respectively.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"16 4","pages":"405-408"},"PeriodicalIF":1.7,"publicationDate":"2024-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142789083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0