Mohamed El-Hadedy;Andrea Abelian;Kenny Lee;Benny N. Cheng;Wen-Mei Hwu
{"title":"安全无人机通信中基于熵的真随机数生成的FPAA-FPGA混合架构","authors":"Mohamed El-Hadedy;Andrea Abelian;Kenny Lee;Benny N. Cheng;Wen-Mei Hwu","doi":"10.1109/LES.2024.3510365","DOIUrl":null,"url":null,"abstract":"Field-programmable gate arrays (FPGAs) and field-programmable analog arrays (FPAAs) are reconfigurable circuits that enable flexible digital and analog implementations post-manufacturing. FPGAs are widely used in telecommunications, mixed-signal, and embedded systems due to their parallel processing and reconfigurability. Meanwhile, FPAAs provide flexibility for analog systems, which is crucial for modern mixed-signal processing. This letter introduces ANUBIS, a hybrid system combining FPGA and FPAA technologies to generate true random number generators (TRNGs) for secure UAV communication. Due to its reliability and cost efficiency, ANUBIS leverages a thermistor circuit as an entropy source. The FPAA amplifies the analog noise generated by the thermistor, while the FPGA digitizes and processes the signal using Von Neumann whitening (VNW) to remove bias. The ASCON hash function is applied to the whitened bitstream to generate cryptographically secure keys. These keys are utilized in a DHKE to enable secure communication via Bluetooth low energy (BLE), an ideal protocol for energy-constrained UAV applications. ANUBIS demonstrates reconfigurability, power efficiency, and ease of implementation, showcasing its potential for secure communication applications. It achieves robust randomization, setting a new standard for UAV communication security and addressing applications requiring reliable TRNG solutions. The system consumes 1.615 W in total, with 1.54 W consumed by the FPGA and 75 mW by the FPAA. Resource utilization on the PYNQ-Z1 board includes 5186 LUTs (9.75%), 549 units of memory (3.15%), and 5.5 units of BRAM (3.93%), indicating moderate resource usage with room for future enhancements. By integrating reliable analog noise harvesting with efficient digital post-processing, ANUBIS offers a novel approach to TRNG design, demonstrating the potential for broader cryptographic applications in resource-constrained environments.","PeriodicalId":56143,"journal":{"name":"IEEE Embedded Systems Letters","volume":"17 3","pages":"164-167"},"PeriodicalIF":1.7000,"publicationDate":"2024-12-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication\",\"authors\":\"Mohamed El-Hadedy;Andrea Abelian;Kenny Lee;Benny N. Cheng;Wen-Mei Hwu\",\"doi\":\"10.1109/LES.2024.3510365\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Field-programmable gate arrays (FPGAs) and field-programmable analog arrays (FPAAs) are reconfigurable circuits that enable flexible digital and analog implementations post-manufacturing. FPGAs are widely used in telecommunications, mixed-signal, and embedded systems due to their parallel processing and reconfigurability. Meanwhile, FPAAs provide flexibility for analog systems, which is crucial for modern mixed-signal processing. This letter introduces ANUBIS, a hybrid system combining FPGA and FPAA technologies to generate true random number generators (TRNGs) for secure UAV communication. Due to its reliability and cost efficiency, ANUBIS leverages a thermistor circuit as an entropy source. The FPAA amplifies the analog noise generated by the thermistor, while the FPGA digitizes and processes the signal using Von Neumann whitening (VNW) to remove bias. The ASCON hash function is applied to the whitened bitstream to generate cryptographically secure keys. These keys are utilized in a DHKE to enable secure communication via Bluetooth low energy (BLE), an ideal protocol for energy-constrained UAV applications. ANUBIS demonstrates reconfigurability, power efficiency, and ease of implementation, showcasing its potential for secure communication applications. It achieves robust randomization, setting a new standard for UAV communication security and addressing applications requiring reliable TRNG solutions. The system consumes 1.615 W in total, with 1.54 W consumed by the FPGA and 75 mW by the FPAA. Resource utilization on the PYNQ-Z1 board includes 5186 LUTs (9.75%), 549 units of memory (3.15%), and 5.5 units of BRAM (3.93%), indicating moderate resource usage with room for future enhancements. By integrating reliable analog noise harvesting with efficient digital post-processing, ANUBIS offers a novel approach to TRNG design, demonstrating the potential for broader cryptographic applications in resource-constrained environments.\",\"PeriodicalId\":56143,\"journal\":{\"name\":\"IEEE Embedded Systems Letters\",\"volume\":\"17 3\",\"pages\":\"164-167\"},\"PeriodicalIF\":1.7000,\"publicationDate\":\"2024-12-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Embedded Systems Letters\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10783001/\",\"RegionNum\":4,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Embedded Systems Letters","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10783001/","RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
ANUBIS: Hybrid FPAA-FPGA Architecture for Entropy-Based True Random Number Generation in Secure UAV Communication
Field-programmable gate arrays (FPGAs) and field-programmable analog arrays (FPAAs) are reconfigurable circuits that enable flexible digital and analog implementations post-manufacturing. FPGAs are widely used in telecommunications, mixed-signal, and embedded systems due to their parallel processing and reconfigurability. Meanwhile, FPAAs provide flexibility for analog systems, which is crucial for modern mixed-signal processing. This letter introduces ANUBIS, a hybrid system combining FPGA and FPAA technologies to generate true random number generators (TRNGs) for secure UAV communication. Due to its reliability and cost efficiency, ANUBIS leverages a thermistor circuit as an entropy source. The FPAA amplifies the analog noise generated by the thermistor, while the FPGA digitizes and processes the signal using Von Neumann whitening (VNW) to remove bias. The ASCON hash function is applied to the whitened bitstream to generate cryptographically secure keys. These keys are utilized in a DHKE to enable secure communication via Bluetooth low energy (BLE), an ideal protocol for energy-constrained UAV applications. ANUBIS demonstrates reconfigurability, power efficiency, and ease of implementation, showcasing its potential for secure communication applications. It achieves robust randomization, setting a new standard for UAV communication security and addressing applications requiring reliable TRNG solutions. The system consumes 1.615 W in total, with 1.54 W consumed by the FPGA and 75 mW by the FPAA. Resource utilization on the PYNQ-Z1 board includes 5186 LUTs (9.75%), 549 units of memory (3.15%), and 5.5 units of BRAM (3.93%), indicating moderate resource usage with room for future enhancements. By integrating reliable analog noise harvesting with efficient digital post-processing, ANUBIS offers a novel approach to TRNG design, demonstrating the potential for broader cryptographic applications in resource-constrained environments.
期刊介绍:
The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software. The emphasis is on models, methods, and tools that ensure secure, correct, efficient and robust design of embedded systems and their applications.