{"title":"Desirable floating-point arithmetic and elementary functions for numerical computation","authors":"T. E. Hull","doi":"10.1145/800208.806442","DOIUrl":"https://doi.org/10.1145/800208.806442","url":null,"abstract":"The purpose of this paper is to summarize proposed specifications for floating-point arithmetic and elementary functions. The topics considered are: the base of the number system, precision control, number representation, arithmetic operations, mother basic operations, elementary functions, and exception handling. The possibility of doing without fixed-point arithmetic is also discussed. The specifications are intended to be entirely at the level of a programming language such as Fortran. The emphasis is on convenience and simplicity from the user's point of view. The specifications are not complete in every detail, but it is intended that they be complete \"in spirit\" — some further details, especially syntatic details, would have to be provided, but the proposals are otherwise relatively complete.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125573812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Logical design of a redundant binary adder","authors":"Catherine Y. Chow, J. E. Robertson","doi":"10.1109/ARITH.1978.6155767","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155767","url":null,"abstract":"This paper investigates the logical design of a redundant binary adder with two input digits and one output digit, all in the digit set {1, 0, 1}. Redundant binary arithmetic structures in which all digit sets are {1, 0, 1} were first discussed by Avizienis in 1961. Borovec studied the logical design of a class of such binary adders and subtracters in 1968. At that time, a variation of the adder/subtracter was overlooked. This paper studies the logical design of this variation. The sum digit is still a function only of the digits in three adjacent digital positions of the operands. \"Coupled don't cares\" are encountered, but have not introduced too much difficulty. The nine distinct formats (under permutation and negation) of representing three values with two bits given by Robertson are used. The simplest adder/subtracter designs from this variation are less complex than the simplest designs previously known.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"361 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115436481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The theory and implementations of high-radix division","authors":"K. G. Tan","doi":"10.1109/ARITH.1978.6155753","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155753","url":null,"abstract":"This report derives the theory of high-radix division in terms of the properties of the overlapped regions of the P-D plot. The minimum precision requirements in quotient selection are discussed. The methods of implementations in hardware and in read-only memory are explored.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123642716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Arithmetic circuit fault detection by modular encoding","authors":"A. Svoboda","doi":"10.1109/ARITH.1978.6155757","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155757","url":null,"abstract":"Design principles of self checking digital circuits are in the focus of the general interest and many papers exist treating that subject. The use of special data encoding techniques, suitable algorithms of arithmetic, special hardware elements have been proposed long ago. The purpose of this paper is to show that the design can produce rather simple self checking circuit when the design principles are chosen which collaborate harmoniously: 1) decimal numerical system is used 2) decimal digit d ε {0, 1, …, 9} is represented in the Diamond Code by the 5-bit binary number f = 3·d + 2 3) decimal digits' addition algorithm introduced here is simple and effective so that 10 decimal digits can be added in parallel 4) implementation of the addition algorithm by conventional Full Adders results in in a single fault detecting circuit. The design of a decimal adder for 10 decimal numbers, each with 10 digits, is described here as an illustration. It shows the way how to design other decimal arithmetic circuits which are single fault detecting, for instance a multiplier (derived from the adder for 10 decimal numbers).","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116828129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An approximate and empirical study of the distribution of adder inputs and maximum carry length propagation","authors":"Oscar N. Garcia, H. Glass, Stanley C. Haimes","doi":"10.1109/ARITH.1978.6155778","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155778","url":null,"abstract":"This paper investigates, using sampled data, the commonly used hypothesis that integer operands reaching the adder of a computer are uniformly distributed. Questions raised on the validity of that hypothesis are reinforced and their impact on the calculation of the average of the worst case length of carry propagation is considered. An approximate formula is developed for the worst case carry chain length when the arithmetic operands are restricted in magnitude.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125668074","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Required scientific floating point arithmetic","authors":"Lawrence A. Liddiard","doi":"10.1109/ARITH.1978.6155786","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155786","url":null,"abstract":"Previous papers in computer arithmetic have shown that correct rounded floating point with good arithmetic properties can be attained using guard digits and careful algorithms on the floating point fractions. This paper combines that body of knowledge with proposed exponent forms that are closed with respect to inversion and detection and recovery of exponent under and over flow. In addition radix 2 is shown to be the only base radix meeting minimal variation of precision, a condition necessary for the safe use of floating point. An effort is made to establish objective criteria in answer to the question; \"What is the best division of the computer word into exponent and fraction parts?\". Combining the previous results allows a required scientific floating point arithmetic to be portrayed and compared with available arithmetics on current computers.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132471834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Multiple addition of binary serial numbers","authors":"L. Dadda","doi":"10.1109/ARITH.1978.6155772","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155772","url":null,"abstract":"It is shown how circuits for the addition of several serial binary numbers can be obtained as a combination of parallel counters and memory cells. The various schemes belong to one of three different classes, characterized by the way in which carries, produced by parallel counters, are treated. A comparison is made between the various schemes, in terms of speed and complexity.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"610 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115758896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Higher radix on-line division","authors":"Kishor S. Trivedi, Joseph G. Rusnak","doi":"10.1109/ARITH.1978.6155759","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155759","url":null,"abstract":"We present a formal proof of correctness of the on-line division algorithm specified in an earlier paper [1]. We also derive two radix 4 on-line division algorithms, with non-redundant and redundant operands respectively.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114639894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Mathematical approach to iterative computation networks","authors":"D. Cohen","doi":"10.1109/ARITH.1978.6155768","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155768","url":null,"abstract":"This paper deals with design principles for Iterative computation networks. Such computation networks are used for performing repetitive computations which typically are not data-dependent. Most of the signal processing algorithms, like FFT and filtering, belong to this class. The main idea in this paper is the development of mathematical notation for expressing such designs. This notation captures the important features and properties of these computation networks, and can be used both for analyzing and for designing computational networks.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123653538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Basic digit sets for radix representation of the integers","authors":"D. Matula","doi":"10.1109/ARITH.1978.6155789","DOIUrl":"https://doi.org/10.1109/ARITH.1978.6155789","url":null,"abstract":"Let Z denote the set of integers. A digit set D ⊂ Z is basic for base β ∊ Z if the set of polynomials {d<inf>m</inf>β<sup>m</sup> + d<inf>m−1</inf> + … + d<inf>1</inf> β+d<inf>0</inf> | d<inf>I</inf> ∊ D} contains a unique representation for every n ε Z. We give necessary and sufficient conditions for D to be basic for β. We exhibit efficient procedures for verifying that D is basic for β, and for computing the representation of any n ε Z when a representation exists. There exist D, & with D basic for β where max {|d| | d ∊ D} > |β|, and more generally, an infinite class of basic digit sets is shown to exist for every base β with |β| ≥ 3. The natural extension to infinite precision radix representation using basic digit sets is considered and a summary of results is presented.","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123781298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}