{"title":"基于模块化编码的算术电路故障检测","authors":"A. Svoboda","doi":"10.1109/ARITH.1978.6155757","DOIUrl":null,"url":null,"abstract":"Design principles of self checking digital circuits are in the focus of the general interest and many papers exist treating that subject. The use of special data encoding techniques, suitable algorithms of arithmetic, special hardware elements have been proposed long ago. The purpose of this paper is to show that the design can produce rather simple self checking circuit when the design principles are chosen which collaborate harmoniously: 1) decimal numerical system is used 2) decimal digit d ε {0, 1, …, 9} is represented in the Diamond Code by the 5-bit binary number f = 3·d + 2 3) decimal digits' addition algorithm introduced here is simple and effective so that 10 decimal digits can be added in parallel 4) implementation of the addition algorithm by conventional Full Adders results in in a single fault detecting circuit. The design of a decimal adder for 10 decimal numbers, each with 10 digits, is described here as an illustration. It shows the way how to design other decimal arithmetic circuits which are single fault detecting, for instance a multiplier (derived from the adder for 10 decimal numbers).","PeriodicalId":443215,"journal":{"name":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Arithmetic circuit fault detection by modular encoding\",\"authors\":\"A. Svoboda\",\"doi\":\"10.1109/ARITH.1978.6155757\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design principles of self checking digital circuits are in the focus of the general interest and many papers exist treating that subject. The use of special data encoding techniques, suitable algorithms of arithmetic, special hardware elements have been proposed long ago. The purpose of this paper is to show that the design can produce rather simple self checking circuit when the design principles are chosen which collaborate harmoniously: 1) decimal numerical system is used 2) decimal digit d ε {0, 1, …, 9} is represented in the Diamond Code by the 5-bit binary number f = 3·d + 2 3) decimal digits' addition algorithm introduced here is simple and effective so that 10 decimal digits can be added in parallel 4) implementation of the addition algorithm by conventional Full Adders results in in a single fault detecting circuit. The design of a decimal adder for 10 decimal numbers, each with 10 digits, is described here as an illustration. It shows the way how to design other decimal arithmetic circuits which are single fault detecting, for instance a multiplier (derived from the adder for 10 decimal numbers).\",\"PeriodicalId\":443215,\"journal\":{\"name\":\"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1978-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ARITH.1978.6155757\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1978 IEEE 4th Symposium onomputer Arithmetic (ARITH)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ARITH.1978.6155757","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Arithmetic circuit fault detection by modular encoding
Design principles of self checking digital circuits are in the focus of the general interest and many papers exist treating that subject. The use of special data encoding techniques, suitable algorithms of arithmetic, special hardware elements have been proposed long ago. The purpose of this paper is to show that the design can produce rather simple self checking circuit when the design principles are chosen which collaborate harmoniously: 1) decimal numerical system is used 2) decimal digit d ε {0, 1, …, 9} is represented in the Diamond Code by the 5-bit binary number f = 3·d + 2 3) decimal digits' addition algorithm introduced here is simple and effective so that 10 decimal digits can be added in parallel 4) implementation of the addition algorithm by conventional Full Adders results in in a single fault detecting circuit. The design of a decimal adder for 10 decimal numbers, each with 10 digits, is described here as an illustration. It shows the way how to design other decimal arithmetic circuits which are single fault detecting, for instance a multiplier (derived from the adder for 10 decimal numbers).