Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)最新文献_第8页

At-speed boundary-scan interconnect testing in a board with multiple system clocks 在具有多个系统时钟的电路板中进行高速边界扫描互连测试

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307546

Jongchul Shin, H. Kim, Sungho Kang

引用次数: 13

Data type analysis for hardware synthesis from object-oriented models 面向对象模型的硬件综合数据类型分析

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307550

M. Radetzki, Ansgar Stammermann, W. Putzke-Röming, W. Nebel

引用次数: 3

Fast hardware-software co-simulation using VHDL models 使用VHDL模型的快速软硬件协同仿真

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307511

B. Tabbara, M. Sgroi, A. Sangiovanni-Vincentelli, E. Filippi, L. Lavagno

引用次数: 16

Chip-level verification for parasitic coupling effects in deep-submicron digital designs 深亚微米数字设计中寄生耦合效应的芯片级验证

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307583

Lun Ye, Foong-Charn Chang, P. Feldmann, R. Chadha, Nagaraj Ns, F. Cano

引用次数: 2

Efficient techniques for modeling chip-level interconnect, substrate and package parasitics 芯片级互连、基板和封装寄生的有效建模技术

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307536

P. Feldmann, S. Kapur, D. Long

引用次数: 9

Dynamic power management for nonstationary service requests 非固定服务请求的动态电源管理

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307456

Eui-Young Chung, L. Benini, A. Bogliolo, Yung-Hsiang Lu, G. Micheli

引用次数: 229

Parametric fault diagnosis for analog systems using functional mapping 基于功能映射的模拟系统参数化故障诊断

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307489

S. Cherubal, A. Chatterjee

引用次数: 51

Polynomial methods for allocating complex components 分配复杂分量的多项式方法

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307492

James Smith, G. Micheli

引用次数: 25

CRUSADE: hardware/software co-synthesis of dynamically reconfigurable heterogeneous real-time distributed embedded systems 动态可重构异构实时分布式嵌入式系统的硬件/软件协同合成

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307461

Bharat P. Dave

{"title":"CRUSADE: hardware/software co-synthesis of dynamically reconfigurable heterogeneous real-time distributed embedded systems","authors":"Bharat P. Dave","doi":"10.1145/307418.307461","DOIUrl":"https://doi.org/10.1145/307418.307461","url":null,"abstract":"Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-time reconfigurable hardware components such as field programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs). In this paper, we address the problem of hardware/ software co-synthesis of dynamically reconfigurable embedded systems. Our co-synthesis system, CRUSADE, takes as an input embedded system specifications in terms periodic acyclic task graphs with rate constraints and generates dynamically reconfigurable heterogeneous distributed hardware and software architecture meeting real-time constraints while minimizing the system hardware cost. We identify the group of tasks for dynamic reconfiguration of programmable devices and synthesize an efficient programming interface for reconfiguring reprogrammable devices. Real-time systems require that the execution time for tasks mapped to reprogrammable devices are managed effectively such that real-time deadlines are not exceeded. To address this, we propose a technique to effectively manage delay in reconfigurable devices. Our approach guarantees that the real-time task deadlines are always met. To the best of our knowledge, this is the first co-synthesis algorithm which targets dynamically reconfigurable embedded systems. We also show how our co-synthesis algorithm can be easily extended to consider fault-detection and fault-tolerance. Application of CRUSADE and its fault tolerance extension, CRUSADE-FT to several real-life large examples (up to 7400 tasks) from mobile communication network base station, video distribution router, a multi-media system, and synchronous optical network (SONET) and asynchronous transfer mode (ATM) based telecom systems shows that up to 56% system cost savings can be realized.","PeriodicalId":442382,"journal":{"name":"Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126671076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 37

Functional verification methodology for microprocessors using the Genesys test-program generator. Application to the x86 microprocessors family 使用Genesys测试程序生成器的微处理器功能验证方法。应用于x86微处理器家族

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI: 10.1145/307418.307540

L. Fournier, Yaron Arbetman, M. Levinger

引用次数: 71