Data type analysis for hardware synthesis from object-oriented models

Abstract

Object-oriented modeling of hardware promises to help deal with design complexity through higher abstraction and better support for reuse. Whereas simulation of such models is rather easy to achieve, synthesis turns out to require the application of quite sophisticated techniques. In this paper, we devise a solution of the foremost problem, optimized synthesis of object-oriented data types. The outlined algorithms have been implemented for an object-oriented dialect of VHDL and may also contribute, possibly in a co-design context, to synthesis from languages such as C++ or Java. We explain our synthesis methods and show their impact with the example of a microprocessor model.