{"title":"Characteristic Analysis of Ga-Sn-O TFT Subjected to UV Annealing Treatment","authors":"Kenta Tanino, R. Takagi, M. Kimura, T. Matsuda","doi":"10.1109/IMFEDK.2018.8581896","DOIUrl":"https://doi.org/10.1109/IMFEDK.2018.8581896","url":null,"abstract":"We succeeded in forming a Ga-Sn-O (GTO) film for a thin film transistor (TFT) by using a RF magnetron sputtering at room temperature and applying UV annealing (254 nm) treatment. The field effect mobility is 3.53 cm2/V · S. This result suggests the possibility of a rare metal free amorphous metal oxide semiconductor.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122466326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Physical Unclonable Function Using Energy Harvesting","authors":"Y. Nozaki, M. Yoshikawa","doi":"10.1109/IMFEDK.2018.8581978","DOIUrl":"https://doi.org/10.1109/IMFEDK.2018.8581978","url":null,"abstract":"This study proposes a new physical unclonable function using energy harvesting to prevent semiconductor counterfeits. The proposed method uses dispersion of the power generation time due to product variation of semiconductors. Experiments using 5 solar cells evaluate the validity of the proposed method.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125266061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fabrication of Si//Patterned Metal Layer/Si Junctions for Hybrid Multijunction Solar Cells with Improved Bonding Interface Properties","authors":"°T. Hishida, J. Liang, N. Shigekawa","doi":"10.1109/IMFEDK.2018.8581912","DOIUrl":"https://doi.org/10.1109/IMFEDK.2018.8581912","url":null,"abstract":"We successfully fabricate a p+-Si//patterned Al in alignment to SiO2/p+ -Si junction by surface-activated bonding (SAB) of a p+-Si substrate and a patterned Al layer. We find that the interface resistance, which is 0.025 Ω.cm2 in a junction annealed at 300 °C, is much lower than p+ -Si/p+ -Si junction by SAB. This result shows the superiority of junctions using patterned metal layer to directly-bonded semiconductor.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133336251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jumpei Shimura, Keisuke Ikushima, M. Kimura, T. Matsuda
{"title":"Multilayer Cross-Point Synapses Using Ga-Sn-O Thin Films for Neural Network","authors":"Jumpei Shimura, Keisuke Ikushima, M. Kimura, T. Matsuda","doi":"10.1109/IMFEDK.2018.8581900","DOIUrl":"https://doi.org/10.1109/IMFEDK.2018.8581900","url":null,"abstract":"We have developed multilayer cross-point synapses using Ga-Sn-O (GTO) thin films for neural networks. Twenty intermediate layer metal lines and ten lower and upper layer metal lines make 400 cross-point synapses integrated on a glass substrate. By continuously applying a constant voltage to the GTO thin films, the current value is changed. As a result, we obtained degradation that can be applied to the modified Hebb's learning rule.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123403832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yuki Shibayama, D. Yamakawa, M. Kimura, Y. Nakashima
{"title":"In-Ga-Zn-O Thin Film Synapse in Neural Network Using LSI","authors":"Yuki Shibayama, D. Yamakawa, M. Kimura, Y. Nakashima","doi":"10.1109/IMFEDK.2018.8581971","DOIUrl":"https://doi.org/10.1109/IMFEDK.2018.8581971","url":null,"abstract":"We fabricated In-Ga-Zn-O (IGZO) thin film synapses for neural networks using an LSI. The current flowing in the IGZO thin film degraded gradually. It shows a sufficient degradation in electrical characteristics, and it can be used for the modified Hebbian learning rule proposed by the authors.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132218871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Aspects and Reduction of Miller Capacitance of Lateral Tunnel FETs","authors":"Yuyang Jiang, Shingo Sato, Y. Omura, A. Mallik","doi":"10.1109/IMFEDK.2018.8581961","DOIUrl":"https://doi.org/10.1109/IMFEDK.2018.8581961","url":null,"abstract":"This paper discusses aspects of gate-to-drain capacitance (Miller capacitance) of lateral tunnel FETs (LTFETs). It is considered how to reduce the mirror capacitance of LTFET.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131854829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reserch on the Trans-Linked Four-Phase Interleaved Step Down Chopper","authors":"Y. Sogabe","doi":"10.1109/imfedk.2018.8581946","DOIUrl":"https://doi.org/10.1109/imfedk.2018.8581946","url":null,"abstract":"48 Voltage mild hybrid vehicle noticed in motive industry needs DC/DC converters of compact and light weight. The proposed circuit can decrease current ripple of the inductor and the smoothing capacitor as compared with the conventional circuit. The operation characteristics and performance of proposed trans-linked four phase step down chopper circuit is discussed with simulation and experimental results.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127611858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Tamper Resistance Evaluation of Noise Based Countermeasure for IoT Devices","authors":"K. Shibagaki, Y. Nozaki, M. Yoshikawa","doi":"10.1109/IMFEDK.2018.8581975","DOIUrl":"https://doi.org/10.1109/IMFEDK.2018.8581975","url":null,"abstract":"A lightweight block cipher which can be implemented on small scale devices has attracted attention. Regarding tamper resistance, the risk of power analysis attacks has been reported even though the encryption algorithm is computationally secured. Therefore, countermeasures for power analysis attacks are very important. This study proposes the small scale countermeasure against power analysis attacks for a lightweight block cipher.","PeriodicalId":434417,"journal":{"name":"2018 IEEE International Meeting for Future of Electron Devices, Kansai (IMFEDK)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126320016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}