2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)最新文献_第9页

Tungsten as a CMOS compatible catalyst for the Metal-assisted Chemical Etching of silicon to create 2D and 3D nanostructures 钨作为CMOS兼容催化剂，用于硅的金属辅助化学蚀刻，以创建2D和3D纳米结构

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490739

O. Hildreth, C. Álvarez, C. Wong

引用次数: 5

Packaging and AC powering of LED array LED阵列封装及交流供电

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490921

W. Feng, Yongzhi He, F. Shi

{"title":"Packaging and AC powering of LED array","authors":"W. Feng, Yongzhi He, F. Shi","doi":"10.1109/ECTC.2010.5490921","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490921","url":null,"abstract":"High power LEDs for lighting application can be implemented with dies. Multiple LEDs are usually connected in series to sustain high power supply voltage like AC 110V due to low LED forward voltage. AC-DC converter is often required for LED arrays working under an AC power supply. But the AC-DC converter brings power consumption overhead and degrades the overall system efficiency as much as 15%. In this work, a high power ceramic COB (Chip On Board) LED array packaging technology capable of working under AC 110V is developed. A total of 40 LEDs are used in the ceramic COB LEDs array to allow it work directly under AC 110V power supply. A special powering method is designed and dedicated to the COB LED array. The special powering method ensures both high light output and high LEDs array reliability especially under supply voltage variations. The measured COB LEDs current vs. AC supply voltage variation is shown in Fig.1 An extremely high driving efficiency (>98%) at the max power and a high power factor are achieved due to the elimination of the AC-DC converter. The electrical efficiency over LEDs forward current is plotted in Fig.2. The structure and top view of COB LED packaging is shown in Fig.3 and Fig.4. The COB package dimension is 68mm by 28mm. With 150mA LEDs forward current, the measured total power is 20W. The max LEDs forward current for this design is 700mA and the max power is 95W. The cross section of the PCB design is shown in Fig.5. Since AC-DC converter reliability is becoming the bottleneck of the high power LED lighting system, the presented ceramic COB LEDs array package with the special powering circuit reliability is enhanced due to the elimination of AC-DC converter. The system reliability is performed and shown in Fig.6. There is no performance degradation of both the ceramic COB LED and control circuit for 1000 hours. Long term reliability test of the system is still under testing and will be presented.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"59 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124086863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Integrated power electronics using a ferrite-based low-temperature co-fired ceramic materials system 采用基于铁氧体的低温共烧陶瓷材料系统集成电力电子器件

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490764

A. Roesler, J. Schare, Chad Hettler, D. Abel, G. Slama, D. Schofield

{"title":"Integrated power electronics using a ferrite-based low-temperature co-fired ceramic materials system","authors":"A. Roesler, J. Schare, Chad Hettler, D. Abel, G. Slama, D. Schofield","doi":"10.1109/ECTC.2010.5490764","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490764","url":null,"abstract":"This paper discusses a new approach to making hybrid power electronic circuits by combining a low-temperature (850°C to 950°C) co-fired ceramic (LTCC) substrate, planar LTCC ferrite transformers/inductors and integrated passive components into a multilayer monolithic package using a ferrite-based LTCC material system. A ferrite tape functions as the base material for this LTCC system. The material system includes physically and chemically compatible dielectric paste, dielectric tape and conductor materials which can be co-fired with the base ferrite LTCC tape to create sintered devices with excellent magnetic coupling, high permeability (~400), high resistivity (> 1012 Ω·cm) and good saturation (~0.3 T). The co-fired ferrite and dielectric materials can be used as a substrate for attaching or housing semiconductor components and other discrete devices that are part of the power electronics system. Furthermore, the ability to co-fire the ferrite with dielectric and conductor materials allows for the incorporation of embedded passives in the multilayer structure to create hybrid power electronic circuits. Overall this thick film material set offers a unique approach to making hybrid power electronics and could potentially allow a size reduction for many commercial dc-dc converter and other power electronic circuits.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124570145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Effect of Ag grain size on high temperature joint formation in Ag-In system 银晶粒尺寸对银-银体系高温节理形成的影响

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490745

Pin J. Wang, Chu-Hsuan Sha, Chin C. Lee

{"title":"Effect of Ag grain size on high temperature joint formation in Ag-In system","authors":"Pin J. Wang, Chu-Hsuan Sha, Chin C. Lee","doi":"10.1109/ECTC.2010.5490745","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490745","url":null,"abstract":"After many experiments in developing fluxless Ag-In joints, we realize that the success of producing a joint relates to microstructure of the Ag layer. Ag with small grains results in rapid growth of solid Ag2In intermetallic compounds through grain boundary diffusion. Thus, a joint is not obtained because of lack of molten phase, (L). To coarsen Ag grains, an annealing step is added to the Ag-plated Cu substrate. This step makes Ag grains 200 times coarser compared to the as-plated Ag. The coarsened microstructure slows down the Ag2In growth. Consequently, the (L) phase stays at molten state with sufficient time to react with the Ag layer on Si chip to produce a joint. Nearly perfect joints are produced on Ag-plated Cu substrates. The resulting joints consist of pure Ag, Ag-rich solid solution, Ag2In, and Ag3In. The melting temperature exceeds 650°C. Using the present process, high temperature joints of high thermal conductivity are made between Si chips and Cu substrates at low bonding temperature (200°C). We foresee the Ag-In system as an important system to explore for various fluxless bonding applications. This system provides the possibilities of producing joints of wide composition choices and wide melting temperature range. Present study provides preliminary but useful information on how the microstructure of Ag affects the bonding results.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124029965","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

12-Channel × 20-Gbps on-board parallel optical modules using multi-chip visual alignment technique 采用多芯片视觉对准技术的12通道× 20gbps板载并行光模块

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490963

T. Sugimoto, Y. Hashimoto, K. Yamamoto, M. Kurihara, M. Oda, J. Sakai, H. Ono, T. Akagawa, K. Yashiki, H. Hatayama, N. Suzuki, M. Tsuji, I. Ogura, H. Kouta, K. Kurata

引用次数: 6

Three dimensional air-gap structures for MEMS packaging MEMS封装的三维气隙结构

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490722

R. Saha, N. Fritz, S. Bidstrup-Allen, P. Kohl

{"title":"Three dimensional air-gap structures for MEMS packaging","authors":"R. Saha, N. Fritz, S. Bidstrup-Allen, P. Kohl","doi":"10.1109/ECTC.2010.5490722","DOIUrl":"https://doi.org/10.1109/ECTC.2010.5490722","url":null,"abstract":"Air-gap structures are of interest in a range of microelectronic applications especially in microelectromechanical systems (MEMS). In this work, we investigate the application of an unique trimaterial for MEMS packaging composed of polypropylene carbonate (PPC) as a sacrificial material, a photosensitive, hybrid inorganic/organic dielectric epoxycyclohexyl polyhedral oligomeric silsesquioxanes (POSS) as the overcoat material, and Al/Cr-Cu thin metal film as a hermetic seal. POSS was used both for patterning the PPC over the structures as well as a stable overcoat material thus reducing the complexity of the fabrication process. A wide range of device sizes and structures (from 20 × 100 µm to 600 × 1000 µm) were fabricated and the processing protocol was found to be compliant over these size/structure variations. Metal adhesion on the overcoat was substantially improved by using low power oxygen plasma for short durations. Cavity-strength was evaluated for different metals and thicknesses. An increase of 5.6 times in cavity-strength was observed for a thicker (3X) Al metal film. Current work is focused on implementing the wafer-level air-cavity package into a lead frame packaged MEMS device through injection and compression molding techniques.","PeriodicalId":429629,"journal":{"name":"2010 Proceedings 60th Electronic Components and Technology Conference (ECTC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129264757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Link analysis and design of high speed storage buses in backplane and cabling environments 高速存储总线在背板和布线环境下的链路分析与设计

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490690

N. Na, Tao Wang, Scot Baumgartner, R. Mandrekar, Yaping Zhou

引用次数: 1

Mechanical analysis and reliability enhancement of a Proximity Communication flip chip package 近距离通信倒装芯片封装的力学分析与可靠性增强

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490905

B. Guenin, Jing Shi

引用次数: 0

Studies on various 2-metal chip-on-flex (COF) packaging methods 各种柔性芯片(COF)封装方法的研究

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490843

Kyoung-Lim Suk, Jong-Soo Kim, K. Paik

引用次数: 0

RF MEMS wafer-level packaging using solder paste by via filling process RF MEMS晶圆级封装采用焊膏通过填充工艺

2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) Pub Date : 2010-06-01 DOI: 10.1109/ECTC.2010.5490672

Sunghae Jung, Myunglae Lee, J. Moon

引用次数: 2